Self-aligned (top and bottom) double-gate MOSFET with a 25 nm thick silicon channel

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 427-430

  Wong, Hon Sum Philip ^a   Chan, Kevin K ^a   Taur, Yuan ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SILICON CHANNEL;

ELECTRIC RESISTANCE; GATES (TRANSISTOR); SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES;

MOSFET DEVICES;

EID: 84886447996     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)