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Volumn 17, Issue 11, 1996, Pages 509-511
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Fully depleted dual-gated thin-film SOI P-MOSFET's fabricated in SOI islands with an isolated buried polysilicon backgate
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Author keywords
[No Author keywords available]
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Indexed keywords
EPITAXIAL GROWTH;
INTERFACES (MATERIALS);
SEMICONDUCTING FILMS;
SEMICONDUCTING SILICON;
SEMICONDUCTOR DEVICE MANUFACTURE;
SEMICONDUCTOR GROWTH;
SILICON ON INSULATOR TECHNOLOGY;
CHEMICAL MECHANICAL PLANARIZATION;
EPITAXIAL LATERAL OVERGROWTH;
POLYSILICON BACKGATE;
THRESHOLD VOLTAGE;
MOSFET DEVICES;
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EID: 0030283640
PISSN: 07413106
EISSN: None
Source Type: Journal
DOI: 10.1109/55.541764 Document Type: Article |
Times cited : (41)
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References (8)
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