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Volumn 21, Issue 9, 2000, Pages 412-414

Reduced reverse narrow channel effect in thin SOI nMOSFETs

Author keywords

[No Author keywords available]

Indexed keywords

INTERFACES (MATERIALS); REDUCTION; SILICON ON INSULATOR TECHNOLOGY; THIN FILMS; THRESHOLD VOLTAGE;

EID: 0034259590     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (9)

References (13)
  • 3
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    • High current, small parasitic capacitance MOSFET on a poly-Si interlayered (PSI: Ψ) SOI wafer
    • M. Horiuchi, T. Teshima, K. Tokuumasu, and K. Yamaguchi, "High current, small parasitic capacitance MOSFET on a poly-Si interlayered (PSI: Ψ) SOI wafer," in VLSI Tech. Dig., 1995, pp. 33-34.
    • (1995) VLSI Tech. Dig. , pp. 33-34
    • Horiuchi, M.1    Teshima, T.2    Tokuumasu, K.3    Yamaguchi, K.4
  • 4
    • 0029491758 scopus 로고
    • Silicon film thickness and material dependence of reverse short channel effect for SOI NMOSFETs
    • R. Rajgopal et al., "Silicon film thickness and material dependence of reverse short channel effect for SOI NMOSFETs," in IEDM Tech. Dig., 1995, pp. 533-536.
    • (1995) IEDM Tech. Dig. , pp. 533-536
    • Rajgopal, R.1
  • 5
    • 0031104354 scopus 로고    scopus 로고
    • Reduction of the reverse short channel effect in thick SOI MOSFET's
    • D. Tsoukalas et al., "Reduction of the reverse short channel effect in thick SOI MOSFET's," IEEE Electron Device Lett., vol. 18, pp. 90-92, 1997.
    • (1997) IEEE Electron Device Lett. , vol.18 , pp. 90-92
    • Tsoukalas, D.1
  • 6
    • 0029379509 scopus 로고
    • Sidewall-related narrow channel effect in mesa-isolated fully-depleted ultra-thin SOI NMOS devices
    • J. B. Kuo, Y. G. Chen, and K. W. Su, "Sidewall-related narrow channel effect in mesa-isolated fully-depleted ultra-thin SOI NMOS devices," IEEE Electron Device Lett., vol. 16, pp. 379-381, 1995.
    • (1995) IEEE Electron Device Lett. , vol.16 , pp. 379-381
    • Kuo, J.B.1    Chen, Y.G.2    Su, K.W.3
  • 7
    • 0032313691 scopus 로고    scopus 로고
    • Increased channel edge impact ionization in SOI MOSFET's and effects on device operation
    • F. L. Duan, X. Zhao, and D. E. Ioannou, "Increased channel edge impact ionization in SOI MOSFET's and effects on device operation," in Proc. IEEE Int. SOI Conf., 1998, pp. 171-172.
    • (1998) Proc. IEEE Int. SOI Conf. , pp. 171-172
    • Duan, F.L.1    Zhao, X.2    Ioannou, D.E.3
  • 8
    • 0033884178 scopus 로고    scopus 로고
    • The behavior of narrow-width SOI MOSFET's with MESA isolation
    • Mar.
    • H. Wang, M. Chan, Y. Wang, and P. K. Ko, "The behavior of narrow-width SOI MOSFET's with MESA isolation," IEEE Trans. Electron Devices, vol. 47, pp. 593-600, Mar. 2000.
    • (2000) IEEE Trans. Electron Devices , vol.47 , pp. 593-600
    • Wang, H.1    Chan, M.2    Wang, Y.3    Ko, P.K.4
  • 9
    • 0033886157 scopus 로고    scopus 로고
    • Isolation edge depending on gate length of MOSFET's with various isolation structures
    • Apr.
    • T. Oishi, K. Shiozawa, A. Furukawa, Y. Abe, and Y. Tokuda, "Isolation edge depending on gate length of MOSFET's with various isolation structures," IEEE Trans. Electron Devices, vol. 47, pp. 822-827, Apr. 2000.
    • (2000) IEEE Trans. Electron Devices , vol.47 , pp. 822-827
    • Oishi, T.1    Shiozawa, K.2    Furukawa, A.3    Abe, Y.4    Tokuda, Y.5
  • 10
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    • A closed-form backgate-bias related inverse narrow-channel effect model for deep-submicron VLSI CMOS devices using shallow trench isolation
    • Apr.
    • S. C. Lin, J. B. Kuo, K. T. Huang, and S. W. Sun, "A closed-form backgate-bias related inverse narrow-channel effect model for deep-submicron VLSI CMOS devices using shallow trench isolation," IEEE Trans. Electron Devices, vol. 47, pp. 725-733, Apr. 2000.
    • (2000) IEEE Trans. Electron Devices , vol.47 , pp. 725-733
    • Lin, S.C.1    Kuo, J.B.2    Huang, K.T.3    Sun, S.W.4
  • 11
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    • The inverse-narrow-width effect of LOCOS isolated n-MOSFET in high-concentration p-well
    • Dec
    • K. Ohe et al., "The inverse-narrow-width effect of LOCOS isolated n-MOSFET in high-concentration p-well," IEEE Electron Device Lett.. vol. 13, pp. 636-638, Dec 1992.
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    • Ohe, K.1
  • 12
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  • 13
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    • Ono, A.1    Ueno, R.2    Sakai, I.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.