메뉴 건너뛰기




Volumn , Issue , 2007, Pages 1665-1670

Architectural leakage-aware management of partitioned scratchpad memories

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC PROGRAMMING; EMBEDDED SYSTEMS; ENERGY EFFICIENCY; LEAKAGE CURRENTS; LOGIC CIRCUITS;

EID: 34548317609     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2007.364541     Document Type: Conference Paper
Times cited : (18)

References (21)
  • 3
    • 34548368406 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors, Semiconductor Industry Association
    • "International Technology Roadmap for Semiconductors 2002 Edition," Semiconductor Industry Association, http://public.itrs.net.
    • (2002) Edition
  • 4
    • 34548347987 scopus 로고    scopus 로고
    • E. Macii, R. Mehra, M, Poncino, Micro-Architectural Power Estimation and Optimization, in Handbook of EDA for IC Design, G. Martin, L. Lavagno, and L. Scheffer Editors, CRC gg, Boca Raton, Florida, 2006.
    • E. Macii, R. Mehra, M, Poncino, "Micro-Architectural Power Estimation and Optimization," in Handbook of EDA for IC Design, G. Martin, L. Lavagno, and L. Scheffer Editors, CRC gg, Boca Raton, Florida, 2006.
  • 5
    • 21244433898 scopus 로고    scopus 로고
    • Specification and Analysis of Power-Managed Systems
    • Aug
    • A. Bogliolo, L. Benini, E. Lattanzi, G. De Micheli, "Specification and Analysis of Power-Managed Systems", Proceedings of the IEEE, Vol. 92, No. 8, pp. 1308-1346, Aug. 2004.
    • (2004) Proceedings of the IEEE , vol.92 , Issue.8 , pp. 1308-1346
    • Bogliolo, A.1    Benini, L.2    Lattanzi, E.3    De Micheli, G.4
  • 6
    • 0029192697 scopus 로고
    • Cache Design Tradeoffs for Power and Performance Optimization: A Case Study
    • April
    • C. Su, A. Despain, "Cache Design Tradeoffs for Power and Performance Optimization: A Case Study," ISLPD-95, pp. 63-68, April 1995.
    • (1995) ISLPD-95 , pp. 63-68
    • Su, C.1    Despain, A.2
  • 8
    • 0033723925 scopus 로고    scopus 로고
    • Memory Modeling for System Synthesis
    • June
    • S. Coumeri, D. E. Thomas, "Memory Modeling for System Synthesis," IEEE Transactions on VLSI Systems, Vol. 8, No. 3, pp. 327-334, June 2000.
    • (2000) IEEE Transactions on VLSI Systems , vol.8 , Issue.3 , pp. 327-334
    • Coumeri, S.1    Thomas, D.E.2
  • 10
    • 27744500920 scopus 로고    scopus 로고
    • An Efficient Profile-Based Algorithm for Scratchpad Memory Partitioning
    • Nov
    • F. Angiolini, L. Benini, A. Caprara, "An Efficient Profile-Based Algorithm for Scratchpad Memory Partitioning", IEEE Transactions on Computer-Aided Design, Nov 2005, Vol. 24, No. 11, pp. 1660-1676.
    • (2005) IEEE Transactions on Computer-Aided Design , vol.24 , Issue.11 , pp. 1660-1676
    • Angiolini, F.1    Benini, L.2    Caprara, A.3
  • 11
    • 33646923724 scopus 로고    scopus 로고
    • Nonuniform Banking for Reducing Memory Energy Consumption, DATE'05
    • Mar
    • O. Ozturk, M. Kandemir, "Nonuniform Banking for Reducing Memory Energy Consumption," DATE'05: Design, Automation and Test in Europe, Mar. 2005, pp. 814-819.
    • (2005) Design, Automation and Test in Europe , pp. 814-819
    • Ozturk, O.1    Kandemir, M.2
  • 12
    • 0034856732 scopus 로고    scopus 로고
    • S. Kaxiras, Z. Hu, M. Martonosi, Cache decay: Exploiting generational behavior to reduce cache leakage power, ISCA'01: Int. Symp. Computer Architecture, Jun. 2001, pp. 240-251.
    • S. Kaxiras, Z. Hu, M. Martonosi, "Cache decay: Exploiting generational behavior to reduce cache leakage power," ISCA'01: Int. Symp. Computer Architecture, Jun. 2001, pp. 240-251.
  • 13
    • 0036294454 scopus 로고    scopus 로고
    • K. Flautner, N. Kim, S. Martin, D. Blaauw, T. Mudge, Drowsy caches: Simple techniques for reducing leakage power, ISCA'02: Int. Symp. on Computer Architecture, May 2002, pp. 148-157.
    • K. Flautner, N. Kim, S. Martin, D. Blaauw, T. Mudge, "Drowsy caches: Simple techniques for reducing leakage power," ISCA'02: Int. Symp. on Computer Architecture, May 2002, pp. 148-157.
  • 15
    • 31144441199 scopus 로고    scopus 로고
    • Compiler-guided Leakage Optimization for Banked Scratch-Pad Memories
    • Oct
    • M. Kandemir, M. J. Irwin, G. Chen, I. Kolcu, "Compiler-guided Leakage Optimization for Banked Scratch-Pad Memories," IEEE Transactions on VLSI Systems, Vol. 13, No. 10, Oct. 2005, pp. 1136-1146.
    • (2005) IEEE Transactions on VLSI Systems , vol.13 , Issue.10 , pp. 1136-1146
    • Kandemir, M.1    Irwin, M.J.2    Chen, G.3    Kolcu, I.4
  • 16
    • 36948999300 scopus 로고    scopus 로고
    • Reducing Leakage Power in Instruction Cache using WDC for Embedded Processors
    • Jan
    • X. Lu, Y. Fu, "Reducing Leakage Power in Instruction Cache using WDC for Embedded Processors,", ASPDAC'05: Asia South Pacific Design Automation Conference, Jan. 2005, pp. 1292-1295.
    • (2005) ASPDAC'05: Asia South Pacific Design Automation Conference , pp. 1292-1295
    • Lu, X.1    Fu, Y.2
  • 18
    • 0036863795 scopus 로고    scopus 로고
    • T. Givargis, F. Vahid, F., Platune: atuning framework for system-on-a-chip platforms, IEEE Transactions on Computer-Aided Design of Integrated Circuits and System, 21, No. 11, Nov. 2002, pp. 1317-1327.
    • T. Givargis, F. Vahid, F., "Platune: atuning framework for system-on-a-chip platforms", IEEE Transactions on Computer-Aided Design of Integrated Circuits and System, Vol. 21, No. 11, Nov. 2002, pp. 1317-1327.
  • 19
    • 84962779213 scopus 로고    scopus 로고
    • MiBench: A free, commercially representative embedded benchmark suite
    • Dec
    • M. R. Guthaus et al., "MiBench: A free, commercially representative embedded benchmark suite", IEEE 4th Annual Workshop on Workload Characterization, pp. 3-14, Dec. 2001.
    • (2001) IEEE 4th Annual Workshop on Workload Characterization , pp. 3-14
    • Guthaus, M.R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.