-
1
-
-
84949972631
-
Systematic data reuse exploration methodology for irregular access patterns
-
Madrid, Spain, Sept.
-
T. Van Achteren, R. Lauwereins, and F. Catthoor, "Systematic data reuse exploration methodology for irregular access patterns," in Proc. 13th ACM/IEEE Symp. System-Level Synthesis, Madrid, Spain, Sept. 2000, pp. 115-121.
-
(2000)
Proc. 13th ACM/IEEE Symp. System-level Synthesis
, pp. 115-121
-
-
Van Achteren, T.1
Lauwereins, R.2
Catthoor, F.3
-
2
-
-
84863557512
-
Data reuse exploration techniques for loop-dominated applications
-
Paris, France, Apr.
-
_, "Data reuse exploration techniques for loop-dominated applications," in Proc. 5th ACM/IEEE Design Test Europe Conf., Paris, France, Apr. 2002, pp. 428-435.
-
(2002)
Proc. 5th ACM/IEEE Design Test Europe Conf.
, pp. 428-435
-
-
-
3
-
-
0003197260
-
The SUIF compiler for scalable parallel machines
-
Feb.
-
S. P. Amarasinghe, J. M. Anderson, M. S. Lam, and C. W. Tseng, "The SUIF compiler for scalable parallel machines," in Proc. 7th SIAM Conf. Parallel Processing Scientific Computing, Feb. 1995.
-
(1995)
Proc. 7th SIAM Conf. Parallel Processing Scientific Computing
-
-
Amarasinghe, S.P.1
Anderson, J.M.2
Lam, M.S.3
Tseng, C.W.4
-
4
-
-
0004096151
-
-
Ph.D. dissertation. Computer Systems Lab., Stanford Univ., Stanford, CA, Mar.
-
J. M. Anderson, "Automatic computation and data decomposition for multiprocessors," Ph.D. dissertation. Computer Systems Lab., Stanford Univ., Stanford, CA, Mar. 1997.
-
(1997)
Automatic Computation and Data Decomposition for Multiprocessors
-
-
Anderson, J.M.1
-
5
-
-
0001912576
-
Increasing energy efficiency of embedded systems by application-specific memory hierarchy generation
-
Apr.-June
-
L. Benini, A. Macii, E. Macii, and M. Poncino, "Increasing energy efficiency of embedded systems by application-specific memory hierarchy generation," IEEE Des. Test Comput., pp. 74-85, Apr.-June 2000.
-
(2000)
IEEE Des. Test Comput.
, pp. 74-85
-
-
Benini, L.1
Macii, A.2
Macii, E.3
Poncino, M.4
-
6
-
-
0033723498
-
A fully-associative software-managed cache design
-
Vancouver, BC, Canada
-
E. G. Hallnor and S. K. Reinhardt, "A fully-associative software-managed cache design," in Proc. Int. Conf. Computer Architecture, Vancouver, BC, Canada, 2000, pp. 107-116.
-
(2000)
Proc. Int. Conf. Computer Architecture
, pp. 107-116
-
-
Hallnor, E.G.1
Reinhardt, S.K.2
-
7
-
-
0032318285
-
Improving locality using loop and data transformations in an integrated framework
-
Dallas, TX, Dec.
-
M. Kandemir, A. Choudhary, J. Ramanujam, and P. Banerjee, "Improving locality using loop and data transformations in an integrated framework," in Proc. Int. Symp. Microarchitecture, Dallas, TX, Dec. 1998, pp. 285-296.
-
(1998)
Proc. Int. Symp. Microarchitecture
, pp. 285-296
-
-
Kandemir, M.1
Choudhary, A.2
Ramanujam, J.3
Banerjee, P.4
-
8
-
-
0034848113
-
Dynamic management of scratch-pad memory space
-
Las Vegas, N V, June
-
M. Kandemir, J. Ramanujam, M. Irwin, N. Vijaykrishnan, I. Kadayif, and A. Parikh, "Dynamic management of scratch-pad memory space," in Proc. 38th Design Automation Conf., Las Vegas, N V, June 2001, pp. 690-695.
-
(2001)
Proc. 38th Design Automation Conf.
, pp. 690-695
-
-
Kandemir, M.1
Ramanujam, J.2
Irwin, M.3
Vijaykrishnan, N.4
Kadayif, I.5
Parikh, A.6
-
9
-
-
0036053351
-
Compiler-directed scratch pad memory hierarchy design and management
-
June
-
M. Kandemir and A. Choudhary, "Compiler-directed scratch pad memory hierarchy design and management," in Proc. 39th Design Automation Conf., June 2002, pp. 628-633.
-
(2002)
Proc. 39th Design Automation Conf.
, pp. 628-633
-
-
Kandemir, M.1
Choudhary, A.2
-
10
-
-
0032662841
-
An affine partitioning algorithm to maximize parallelism and minimize communication
-
June
-
A. W. Lim, G. I. Cheong, and M. S. Lam, "An affine partitioning algorithm to maximize parallelism and minimize communication," in Proc. 13th ACM SIGARCH Int. Conf. Supercomputrng, June 1999, pp. 228-237.
-
(1999)
Proc. 13th ACM SIGARCH Int. Conf. Supercomputrng
, pp. 228-237
-
-
Lim, A.W.1
Cheong, G.I.2
Lam, M.S.3
-
11
-
-
0030686025
-
Efficient utilization of scratch-pad-memory in embedded processor applications
-
Paris, France, Mar.
-
P. R. Panda, N. D. Dutt, and A. Nicolau, "Efficient utilization of scratch-pad-memory in embedded processor applications," in Proc. Eur.Design Test Conf., Paris, France, Mar. 1997, pp. 7-11.
-
(1997)
Proc. Eur.Design Test Conf.
, pp. 7-11
-
-
Panda, P.R.1
Dutt, N.D.2
Nicolau, A.3
-
12
-
-
0030656667
-
Architectural exploration and optimization of local memory in embedded systems
-
Antwerp, Belgium, Sept.
-
_, "Architectural exploration and optimization of local memory in embedded systems," in Proc. Int. Symp. System Synthesis, Antwerp, Belgium, Sept. 1997, pp. 90-97.
-
(1997)
Proc. Int. Symp. System Synthesis
, pp. 90-97
-
-
-
13
-
-
2142641020
-
Assigning program and data objects to scratchpad for energy reduction
-
Paris, France
-
S. Steinke et al., "Assigning program and data objects to scratchpad for energy reduction," in Proc. Eur. Design Test Conf, Paris, France, 2002, pp. 1-7.
-
(2002)
Proc. Eur. Design Test Conf
, pp. 1-7
-
-
Steinke, S.1
-
14
-
-
0032303141
-
A formalized methodology for data reuse exploration for low-power hierarchical memory mappings
-
Dec.
-
S. Wuytack, J. P. Diguet, F. Catthoor, and H. De Man, "A formalized methodology for data reuse exploration for low-power hierarchical memory mappings," IEEE Trans. VLSI Syst., vol. 6, pp. 529-537, Dec. 1998.
-
(1998)
IEEE Trans. VLSI Syst.
, vol.6
, pp. 529-537
-
-
Wuytack, S.1
Diguet, J.P.2
Catthoor, F.3
De Man, H.4
|