Overlay techniques for scratchpad memories in low power embedded processors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 8, 2006, Pages 802-815

  Verma, Manish ^a,b   Marwedel, Peter ^a,b  

^a IEEE   (Germany)

^b TU DORTMUND UNIVERSITY   (Germany)

Author keywords

Code overlay; Memory aware code optimization; Scratchpad memory (SPM)

Indexed keywords

CODE OVERLAY; MEMORY AWARE CODE OPTIMIZATION; OVERLAYING SCRATCHPAD; SCRATCHPAD MEMORY (SPM);

DATA STORAGE EQUIPMENT; DIGITAL SIGNAL PROCESSING; EMBEDDED SYSTEMS; ENERGY UTILIZATION; MICROPROCESSOR CHIPS; PROBLEM SOLVING; STORAGE ALLOCATION (COMPUTER);

PROGRAM PROCESSORS;

EID: 33747437310     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.878469     Document Type: Article

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