Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3 product family

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn 2016-April, Issue , 2016, Pages 657-668

  Herdrich, Andrew ^a   Verplanke, Edwin ^a   Autee, Priya ^a   Illikkal, Ramesh ^a   Gianos, Chris ^a   Singhal, Ronak ^a   Iyer, Ravi ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; SUPERCOMPUTERS; VIRTUAL ADDRESSES;

CACHE ALLOCATION; COMMUNICATIONS PLATFORM; KEY TECHNOLOGIES; MULTI-CORE SERVERS; PRACTICAL SOLUTIONS; RUNNING APPLICATIONS; SHARED RESOURCE CONTENTIONS; SOFTWARE INFRASTRUCTURE;

QUALITY OF SERVICE;

EID: 84965064941     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2016.7446102     Document Type: Conference Paper

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