메뉴 건너뛰기




Volumn 6, Issue 1, 2016, Pages 87-100

Multilevel-Cell Phase-Change Memory: A Viable Technology

Author keywords

Memory; nonvolatile memory; phase change memory; Semiconductor device reliability

Indexed keywords

CELLS; CYTOLOGY; DATA STORAGE EQUIPMENT; DIGITAL STORAGE; DYNAMIC RANDOM ACCESS STORAGE; FLASH MEMORY; NONVOLATILE STORAGE; SEMICONDUCTOR DEVICES;

EID: 84963945096     PISSN: 21563357     EISSN: None     Source Type: Journal    
DOI: 10.1109/JETCAS.2016.2528598     Document Type: Article
Times cited : (133)

References (26)
  • 1
    • 78650005927 scopus 로고    scopus 로고
    • Phase change memory
    • Dec.
    • H.-S. Wong et al., "Phase change memory," Proc. IEEE, vol. 98, pp. 2201-2227, Dec. 2010.
    • (2010) Proc. IEEE , vol.98 , pp. 2201-2227
    • Wong, H.-S.1
  • 2
    • 77950580500 scopus 로고    scopus 로고
    • Phase change memory technology
    • Mar.
    • G. W. Burr et al., "Phase change memory technology," J. Vacuum Sci. Technol. B, vol. 28, pp. 223-262, Mar. 2010.
    • (2010) J. Vacuum Sci. Technol. B , vol.28 , pp. 223-262
    • Burr, G.W.1
  • 3
    • 55449115308 scopus 로고    scopus 로고
    • Storage-class memory: The next storage system technology
    • Jul.
    • R. Freitas and W. Wilcke, "Storage-class memory: The next storage system technology," IBM J. Res. Develop., vol. 52, pp. 439-447, Jul. 2008.
    • (2008) IBM J. Res. Develop. , vol.52 , pp. 439-447
    • Freitas, R.1    Wilcke, W.2
  • 4
    • 84878409578 scopus 로고    scopus 로고
    • A 256-mcell phase-change memory chip operating at bit/cell
    • Jun.
    • G. Close et al., "A 256-mcell phase-change memory chip operating at bit/cell," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 60, no. 6, pp. 1521-1533, Jun. 2013.
    • (2013) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.60 , Issue.6 , pp. 1521-1533
    • Close, G.1
  • 5
    • 46049090421 scopus 로고    scopus 로고
    • Full integration of highly manufacturable 512 mb pram based on 90 nm technology
    • Dec.
    • J. Oh et al., "Full integration of highly manufacturable 512 mb pram based on 90 nm technology," in IEEE Int. Electron Devices Meet., Dec. 2006, pp. 1-4.
    • (2006) IEEE Int. Electron Devices Meet. , pp. 1-4
    • Oh, J.1
  • 6
    • 58149231291 scopus 로고    scopus 로고
    • A bipolar-selected phase change memory featuring multi-level cell storage
    • Jan.
    • F. Bedeschi et al., "A bipolar-selected phase change memory featuring multi-level cell storage," IEEE J. Solid-State Circuits, vol. 44, no. 1, pp. 217-227, Jan. 2009.
    • (2009) IEEE J. Solid-State Circuits , vol.44 , Issue.1 , pp. 217-227
    • Bedeschi, F.1
  • 7
    • 84864127801 scopus 로고    scopus 로고
    • A framework for reliability assessment in multilevel phase-change memory
    • May
    • H. Pozidis et al., "A framework for reliability assessment in multilevel phase-change memory," in IEEE Int. Memory Workshop, May 2012, pp. 145-149.
    • (2012) IEEE Int. Memory Workshop , pp. 145-149
    • Pozidis, H.1
  • 8
    • 50249177041 scopus 로고    scopus 로고
    • Physical interpretation, modeling and impact on phase change memory (PCM) reliability of resistance drift due to chalcogenide structural relaxation
    • Dec.
    • D. Ielmini, S. Lavizzari, D. Sharma, A. Lacaita, "Physical interpretation, modeling and impact on phase change memory (PCM) reliability of resistance drift due to chalcogenide structural relaxation," in IEEE Int. Electron Devices Meet., Dec. 2007, pp. 939-942.
    • (2007) IEEE Int. Electron Devices Meet. , pp. 939-942
    • Ielmini, D.1    Lavizzari, S.2    Sharma, D.3    Lacaita, A.4
  • 9
    • 42149105894 scopus 로고    scopus 로고
    • Write strategies for 2 and 4-bit multi-level phasechange memory
    • Dec.
    • T. Nirschl et al., "Write strategies for 2 and 4-bit multi-level phasechange memory," in IEEE Int. Electron Devices Meet., Dec. 2007, pp. 461-464.
    • (2007) IEEE Int. Electron Devices Meet. , pp. 461-464
    • Nirschl, T.1
  • 10
    • 79960855650 scopus 로고    scopus 로고
    • Programming algorithms for multilevel phasechange memory
    • May
    • N. Papandreou et al., "Programming algorithms for multilevel phasechange memory," in Proc. IEEE Int. Symp. Circuits Syst., May 2011, pp. 329-332.
    • (2011) Proc. IEEE Int. Symp. Circuits Syst. , pp. 329-332
    • Papandreou, N.1
  • 12
    • 0019026872 scopus 로고
    • Threshold switching in chalcogenide-glass thin films
    • Jul.
    • D. Adler, M. S. Shur, M. Silver, S. R. Ovshinsky, "Threshold switching in chalcogenide-glass thin films," J. Appl. Phys., vol. 51, pp. 3289-3309, Jul. 1980.
    • (1980) J. Appl. Phys. , vol.51 , pp. 3289-3309
    • Adler, D.1    Shur, M.S.2    Silver, M.3    Ovshinsky, S.R.4
  • 13
    • 2442604559 scopus 로고    scopus 로고
    • Low-field amorphous state resistance and threshold voltage drift in chalcogenide materials
    • May
    • A. Pirovano et al., "Low-field amorphous state resistance and threshold voltage drift in chalcogenide materials," IEEE Trans. Electron Devices, vol. 51, no. 5, pp. 714-719, May 2004.
    • (2004) IEEE Trans. Electron Devices , vol.51 , Issue.5 , pp. 714-719
    • Pirovano, A.1
  • 14
    • 79960015315 scopus 로고    scopus 로고
    • Drift-tolerant multilevel phase-change memory
    • May
    • N. Papandreou et al., "Drift-tolerant multilevel phase-change memory," in IEEE Int. Memory Workshop, May 2011, pp. 157-160.
    • (2011) IEEE Int. Memory Workshop , pp. 157-160
    • Papandreou, N.1
  • 15
    • 67349254101 scopus 로고    scopus 로고
    • Reliability impact of chalcogenide-structure relaxation in phase-change memory (PCM) cells-Part I: Experimental study
    • May
    • D. Ielmini, D. Sharma, S. Lavizzari, A. Lacaita, "Reliability impact of chalcogenide-structure relaxation in phase-change memory (PCM) cells-Part I: Experimental study," IEEE Trans. Electron Devices, vol. 56, pp. 1070-1077, May 2009.
    • (2009) IEEE Trans. Electron Devices , vol.56 , pp. 1070-1077
    • Ielmini, D.1    Sharma, D.2    Lavizzari, S.3    Lacaita, A.4
  • 17
    • 34548758518 scopus 로고    scopus 로고
    • Data retention characterization of phase-change memory arrays
    • Apr.
    • B. Gleixner et al., "Data retention characterization of phase-change memory arrays," in Proc. IEEE Int. Reliabil. Phys. Symp., Apr. 2007, pp. 542-546.
    • (2007) Proc. IEEE Int. Reliabil. Phys. Symp. , pp. 542-546
    • Gleixner, B.1
  • 19
    • 77957895258 scopus 로고    scopus 로고
    • Thermal disturbance and its impact on reliability of phase-change memory studied by the micro-thermal stage
    • May
    • S. Kim et al., "Thermal disturbance and its impact on reliability of phase-change memory studied by the micro-thermal stage," in Proc. IEEE Int. Reliabil. Phys. Symp., May 2010, pp. 99-103.
    • (2010) Proc. IEEE Int. Reliabil. Phys. Symp. , pp. 99-103
    • Kim, S.1
  • 21
    • 79951822603 scopus 로고    scopus 로고
    • Device, circuit and system-level analysis of noise in multi-bit phase-change memory
    • Dec.
    • G. F. Close et al., "Device, circuit and system-level analysis of noise in multi-bit phase-change memory," in IEEE Int. Electron Devices Meet., Dec. 2010, pp. 29.5.1-29.5.4.
    • (2010) IEEE Int. Electron Devices Meet. , pp. 2951-2954
    • Close, G.F.1
  • 23
    • 84892180578 scopus 로고
    • Permutation modulation
    • Mar.
    • D. Slepian, "Permutation modulation," Proc. IEEE, vol. 53, no. 3, pp. 228-236, Mar. 1965.
    • (1965) Proc. IEEE , vol.53 , Issue.3 , pp. 228-236
    • Slepian, D.1
  • 24
    • 0015565580 scopus 로고
    • Enumerative source encoding
    • Jan.
    • T. Cover, "Enumerative source encoding," IEEE Trans. Inf. Theory, vol. 19, no. 1, pp. 73-77, Jan. 1973.
    • (1973) IEEE Trans. Inf. Theory , vol.19 , Issue.1 , pp. 73-77
    • Cover, T.1
  • 25
    • 84922567710 scopus 로고    scopus 로고
    • A 6-bit drift-resilient readout scheme for multilevel phase-change memory
    • Nov.
    • A. Athmanathan et al., "A 6-bit drift-resilient readout scheme for multilevel phase-change memory," in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2014, pp. 137-140.
    • (2014) Proc. IEEE Asian Solid-State Circuits Conf. , pp. 137-140
    • Athmanathan, A.1
  • 26
    • 84888882514 scopus 로고    scopus 로고
    • A versatile platform for characterization of solid-state memory channels
    • July
    • N. Papandreou et al., "A versatile platform for characterization of solid-state memory channels," in Int. Conf. Digital Signal Process., July 2013, pp. 1-5.
    • (2013) Int. Conf. Digital Signal Process , pp. 1-5
    • Papandreou, N.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.