Design of built-in test generator circuits using width compression

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 17, Issue 10, 1998, Pages 1044-1051

  Chakrabarty, Krishnendu ^a   Murray, Brian T ^b,c  

^a Boston University   (United States)

^b Duke University   (United States)

^c GENERAL MOTORS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS;

BUILT-IN SELF TEST GENERATOR CIRCUITS;

BUILT-IN SELF TEST;

EID: 0032183225     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.728923     Document Type: Article

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