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Volumn 12, Issue 5, 2013, Pages 851-857

Low-Power VDD/3 write scheme with inversion coding circuit for complementary memristor array

Author keywords

Complementary memristor cell; cross point memories; inversion coding circuit; memristor; sneak path leakage

Indexed keywords

APPLIED VOLTAGES; CODING CIRCUITS; COMPLEMENTARY RESISTIVE SWITCHES; CROSS-POINT MEMORY; MEMRISTOR; OPERATING FREQUENCY; RESISTANCE CHANGE; SNEAK-PATH LEAKAGES;

EID: 84883817746     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2013.2274529     Document Type: Article
Times cited : (25)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.