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Volumn , Issue , 2012, Pages 982-989

Optimizing data allocation and memory configuration for non-volatile memory based hybrid SPM on embedded CMPs

Author keywords

Data allocation; energy; MRAM; NVM; on chip memory; PCM; SPM

Indexed keywords

DATA ALLOCATION; ENERGY; MRAM; NVM; ON CHIP MEMORY; SPM;

EID: 84867406972     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPSW.2012.120     Document Type: Conference Paper
Times cited : (9)

References (28)
  • 1
    • 31144441199 scopus 로고    scopus 로고
    • Compiler-guided leakage optimization for banked scratch-pad memories
    • M. Kandemir, M. J. Irwin, G. Chen, and I. Kolcu, "Compiler-guided leakage optimization for banked scratch-pad memories," IEEE Transactions on VLSI Sysetms, vol. 13, no. 10, pp. 1136-1146, 2005.
    • (2005) IEEE Transactions on VLSI Sysetms , vol.13 , Issue.10 , pp. 1136-1146
    • Kandemir, M.1    Irwin, M.J.2    Chen, G.3    Kolcu, I.4
  • 2
    • 33847743417 scopus 로고    scopus 로고
    • A novel nonvolatile memory with spin torque transfer magnetization switching: Spin-ram
    • M. Hosomi, H. Yamagishi, T. Yamamoto, and et al., "A novel nonvolatile memory with spin torque transfer magnetization switching: Spin-ram," in ISLPED '09, 2005, pp. 459-462.
    • (2005) ISLPED '09 , pp. 459-462
    • Hosomi, M.1    Yamagishi, H.2    Yamamoto, T.3
  • 3
    • 70450277571 scopus 로고    scopus 로고
    • A durable and energy efficient main memory using phase change memory technology
    • P. Zhou, B. Zhao, J. Yang, and Y. Zhang, "A durable and energy efficient main memory using phase change memory technology," in ISCA '09, 2009, pp. 14-23.
    • (2009) ISCA '09 , pp. 14-23
    • Zhou, P.1    Zhao, B.2    Yang, J.3    Zhang, Y.4
  • 4
    • 70450235471 scopus 로고    scopus 로고
    • Architecting phase change memory as a scalable dram alternative
    • B. C. Lee, E. Ipek, O. Mutlu, and D. Burger, "Architecting phase change memory as a scalable dram alternative," in ISCA '09, 2009, pp. 2-13.
    • (2009) ISCA '09 , pp. 2-13
    • Lee, B.C.1    Ipek, E.2    Mutlu, O.3    Burger, D.4
  • 6
    • 51549109199 scopus 로고    scopus 로고
    • Circuit and microarchitecture evaluation of 3d stacking magnetic ram (mram) as a universal memory replacement
    • X. Dong, X. Wu, G. Sun, Y. Xie, H. Li, and Y. Chen, "Circuit and microarchitecture evaluation of 3d stacking magnetic ram (mram) as a universal memory replacement," in DAC '08, 2008, pp. 554-559.
    • (2008) DAC '08 , pp. 554-559
    • Dong, X.1    Wu, X.2    Sun, G.3    Xie, Y.4    Li, H.5    Chen, Y.6
  • 7
    • 70450243083 scopus 로고    scopus 로고
    • Hybrid cache architecture with disparate memory technologies
    • X. Wu, J. Li, L. Zhang, E. Speight, R. Rajamony, and Y. Xie, "Hybrid cache architecture with disparate memory technologies," in ISCA '09, 2009, pp. 34-45.
    • (2009) ISCA '09 , pp. 34-45
    • Wu, X.1    Li, J.2    Zhang, L.3    Speight, E.4    Rajamony, R.5    Xie, Y.6
  • 8
    • 77953117822 scopus 로고    scopus 로고
    • Energy- and endurance-aware design of phase change memory caches
    • Y. Joo, D. Niu, X. Dong, G. Sun, N. Chang, , and Y. Xie, "Energy- and endurance-aware design of phase change memory caches," in DATE '10, 2010, pp. 136-141.
    • (2010) DATE '10 , pp. 136-141
    • Joo, Y.1    Niu, D.2    Dong, X.3    Sun, G.4    Chang, N.5    Xie, Y.6
  • 9
    • 79957545701 scopus 로고    scopus 로고
    • Towards energy efficient hybrid on-chip scratch pad memory with non-volatile memory
    • J. Hu, C. J. Xue, Q. Zhuge, W.-C. Tseng, and E. H.-M. Sha, "Towards energy efficient hybrid on-chip scratch pad memory with non-volatile memory," in DATE '11, 2011, pp. 1-6.
    • (2011) DATE '11 , pp. 1-6
    • Hu, J.1    Xue, C.J.2    Zhuge, Q.3    Tseng, W.-C.4    Sha, E.H.-M.5
  • 10
    • 77953118185 scopus 로고    scopus 로고
    • A nondestructive self-reference scheme for spin-transfer torque random access memory (stt-ram)
    • Y. Chen, H. Li, X. Wang, W. Zhu, W. Xu, and T. Zhang, "A nondestructive self-reference scheme for spin-transfer torque random access memory (stt-ram)," in DATE '10, 2010, pp. 148-153.
    • (2010) DATE '10 , pp. 148-153
    • Chen, Y.1    Li, H.2    Wang, X.3    Zhu, W.4    Xu, W.5    Zhang, T.6
  • 12
    • 70350714582 scopus 로고    scopus 로고
    • Pdram: A hybrid pram and dram main memory system
    • G. Dhiman, R. Ayoub, and T. Rosing, "Pdram: a hybrid pram and dram main memory system," in DAC '09, 2009, pp. 664-469.
    • (2009) DAC '09 , pp. 664-1469
    • Dhiman, G.1    Ayoub, R.2    Rosing, T.3
  • 13
    • 70450273507 scopus 로고    scopus 로고
    • Scalable high performance main memory system using phase-change memory technology
    • M. K. Qureshi, V. Srinivasan, and J. A. Rivers, "Scalable high performance main memory system using phase-change memory technology," in ISCA '09, 2009, pp. 24-33.
    • (2009) ISCA '09 , pp. 24-33
    • Qureshi, M.K.1    Srinivasan, V.2    Rivers, J.A.3
  • 14
    • 77956207016 scopus 로고    scopus 로고
    • Reducing write activities on non-volatile memories in embedded cmps via data migration and recomputation
    • J. Hu, C. J. Xue, W.-C. Tseng, Y. He, M. Qiu, and E. H.-M. Sha, "Reducing write activities on non-volatile memories in embedded cmps via data migration and recomputation," in DAC '10, 2010, pp. 350-355.
    • (2010) DAC '10 , pp. 350-355
    • Hu, J.1    Xue, C.J.2    Tseng, W.-C.3    He, Y.4    Qiu, M.5    Sha, E.H.-M.6
  • 15
    • 77955734495 scopus 로고    scopus 로고
    • Minimizing write activities to non-volatile memory via scheduling and recomputation
    • J. Hu, C. J. Xue, W.-C. Tseng, Q. Zhuge, and E. H.-M. Sha, "Minimizing write activities to non-volatile memory via scheduling and recomputation," in SASP '10, 2010, pp. 7-12.
    • (2010) SASP '10 , pp. 7-12
    • Hu, J.1    Xue, C.J.2    Tseng, W.-C.3    Zhuge, Q.4    Sha, E.H.-M.5
  • 18
    • 77954496810 scopus 로고    scopus 로고
    • Write activity reduction on flash main memory via smart victim cache
    • L. Shi, C. J. Xue, J. Hu, W.-C. Tseng, and E. H.-M. Sha, "Write activity reduction on flash main memory via smart victim cache," in GLVLSI '10, 2010, pp. 91-94.
    • (2010) GLVLSI '10 , pp. 91-94
    • Shi, L.1    Xue, C.J.2    Hu, J.3    Tseng, W.-C.4    Sha, E.H.-M.5
  • 19
    • 78650950735 scopus 로고    scopus 로고
    • Optimal scheduling to minimize non-volatile memory access time with hardware cache
    • W.-C. Tseng, C. J. Xue, Q. Zhuge, J. Hu, and E. H.-M. Sha, "Optimal scheduling to minimize non-volatile memory access time with hardware cache," in VLSI-SOC '10, 2010.
    • (2010) VLSI-SOC '10
    • Tseng, W.-C.1    Xue, C.J.2    Zhuge, Q.3    Hu, J.4    Sha, E.H.-M.5
  • 20
    • 80053145539 scopus 로고    scopus 로고
    • Ontology-driven query expansion using map/reduce framework to facilitate federated queries
    • july
    • N. Alipanah, P. Parveen, L. Khan, and B. Thuraisingham, "Ontology-driven query expansion using map/reduce framework to facilitate federated queries," in 2011 ICWS,, july 2011, pp. 712 -713.
    • (2011) I2011 ICWS , pp. 712-713
    • Alipanah, N.1    Parveen, P.2    Khan, L.3    Thuraisingham, B.4
  • 25
    • 18844371462 scopus 로고    scopus 로고
    • Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
    • S. Udayakumaran and R. Barua, "Compiler-decided dynamic memory allocation for scratch-pad based embedded systems," in CASES '03, 2003, pp. 276-286.
    • (2003) CASES '03 , pp. 276-286
    • Udayakumaran, S.1    Barua, R.2
  • 26
    • 76349091566 scopus 로고    scopus 로고
    • Pcramsim: System-level performance, energy, and area modeling for phase-change ram
    • X. Dong, N. P. Jouppi, and Y. Xie, "Pcramsim: System-level performance, energy, and area modeling for phase-change ram," in ICCAD '09, 2009, pp. 269-275.
    • (2009) ICCAD '09 , pp. 269-275
    • Dong, X.1    Jouppi, N.P.2    Xie, Y.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.