A magnetic tunnel junction based zero standby leakage current retention flip-flop

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 20, Issue 11, 2012, Pages 2044-2053

  Ryu, Kyungho ^a   Kim, Jisu ^a   Jung, Jiwan ^a   Kim, Jung Pill ^b   Kang, Seung H ^b   Jung, Seong Ook ^a  

^a Yonsei University   (South Korea)

^b QUALCOMM INC   (United States)

Author keywords

magnetic tunnel junction (MTJ) logic; nonvolatile flip flop; retention flip flop; spintronics logic

Indexed keywords

CMOS PROCESSS; DESIGN OPTIMIZATION; MAGNETIC TUNNEL JUNCTION; MEMORY CELL; MEMORY ELEMENT; NON-VOLATILE; NONVOLATILITY; PROCESS TECHNOLOGIES; PROCESS VARIATION; RETENTION FLIP-FLOP; SENSING CURRENTS; SILICON AREA; STAND-BY LEAKAGE;

CMOS INTEGRATED CIRCUITS; FLIP FLOP CIRCUITS; MAGNETOELECTRONICS; NANOTECHNOLOGY; OPTIMIZATION;

MAGNETIC DEVICES;

EID: 84864615101     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2011.2172644     Document Type: Article

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