A 12-Bit 3 GS/s pipeline ADC with 0.4 mm 2 and 500 mW in 40 nm digital CMOS

IEEE Journal of Solid-State Circuits

Volumn 47, Issue 4, 2012, Pages 1013-1021

  Chen, Chun Ying ^a   Wu, Jiangfeng ^a   Hung, Juo Jung ^a   Li, Tianwei ^a   Liu, Wenbo ^a   Shih, Wei Ta ^a  

^a BROADCOM CORPORATION   (United States)

Author keywords

Adaptive power and ground; CMOS technology; extrapolation; high resolution; high speed; multiplying digital to analog converter (MDAC); pipelined analog to digital converter (ADC)

Indexed keywords

ADAPTIVE POWER AND GROUND; ANALOG CONVERTERS; CMOS TECHNOLOGY; HIGH RESOLUTION; PIPELINED ANALOG-TO-DIGITAL CONVERTER;

EXTRAPOLATION; VLSI CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 84862795384     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2012.2185192     Document Type: Conference Paper

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