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Volumn , Issue , 2011, Pages

End-to-end error correction and online diagnosis for on-chip networks

Author keywords

[No Author keywords available]

Indexed keywords

BURST ERRORS; DATA GATHERING; DEFECT DIAGNOSIS; ERROR CORRECTING CODE; ERROR CORRECTION CAPABILITY; ESCAPE RATE; EXPERIMENTAL STUDIES; HARMFUL EFFECTS; NETWORK LINKS; ON-CHIP NETWORKS; ON-LINE DIAGNOSIS;

EID: 84857621446     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2011.6139156     Document Type: Conference Paper
Times cited : (56)

References (37)
  • 1
    • 78651066017 scopus 로고    scopus 로고
    • Top 11 technologies of the decade; #5: Multicore CPUs
    • Jan.
    • S.K. Moore, "Top 11 technologies of the decade; #5: Multicore CPUs", IEEE Spectrum, vol. 48, no. 1, pp. 40-42, Jan. 2011.
    • (2011) IEEE Spectrum , vol.48 , Issue.1 , pp. 40-42
    • Moore, S.K.1
  • 3
    • 38549121575 scopus 로고    scopus 로고
    • The future of microprocessors
    • Sep.
    • K. Olukotun and L. Hammond, "The future of microprocessors," ACM Queue Magazine, vol. 3, no. 7, Sep. 2005.
    • (2005) ACM Queue Magazine , vol.3 , Issue.7
    • Olukotun, K.1    Hammond, L.2
  • 7
    • 84857544074 scopus 로고    scopus 로고
    • NVIDIA Quadro FX 5600. http://www.nvidia.com/docs/IO/40049/quadro-fx- 5600-datasheet.pdf
    • NVIDIA Quadro FX 5600
  • 8
    • 0036149420 scopus 로고    scopus 로고
    • Networks on chips: A new SoC paradigm
    • DOI 10.1109/2.976921
    • L. Benini and G. De Micheli, "Networks on chips: a new SoC paradigm," IEEE Computer, vol. 35, pp. 70-78, 2002. (Pubitemid 34069383)
    • (2002) Computer , vol.35 , Issue.1 , pp. 70-78
    • Benini, L.1    De Micheli, G.2
  • 10
    • 4243457293 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors (I.T.R.S), 2009 Edition
    • International Technology Roadmap for Semiconductors (I.T.R.S), 2009 Edition, Test and Test Equipment, 2009.
    • (2009) Test and Test Equipment
  • 12
    • 84942033424 scopus 로고    scopus 로고
    • Networks-on-chip: The quest for on-chip fault-tolerant communication
    • R. Marculescu, "Networks-on-chip: the quest for on-chip fault-tolerant communication," Proc. of the Symposium on VLSI, pp. 8-12, 2003.
    • (2003) Proc. of the Symposium on VLSI , pp. 8-12
    • Marculescu, R.1
  • 16
    • 71949123871 scopus 로고    scopus 로고
    • Quantitative cost modeling of error protection for network-on-chip
    • M.C. Neuenhahn, D. Lemmer, H. Blume, and T.G. Noll, "Quantitative cost modeling of error protection for network-on-chip," Proc. ProRISK Workshop, pp. 331-337, 2007.
    • (2007) Proc. ProRISK Workshop , pp. 331-337
    • Neuenhahn, M.C.1    Lemmer, D.2    Blume, H.3    Noll, T.G.4
  • 22
    • 35448956611 scopus 로고
    • A class of systematic codes for non-independent errors
    • Dec.
    • N.M. Abramson, "A class of systematic codes for non-independent errors," IRE Transactions on Information Theory, vol. IT-5, pp. 150-157, Dec. 1959.
    • (1959) IRE Transactions on Information Theory , vol.IT-5 , pp. 150-157
    • Abramson, N.M.1
  • 26
    • 0032122191 scopus 로고    scopus 로고
    • Reduced-redundancy product codes for burst error correction
    • July
    • R.M. Roth and G. Seroussi, "Reduced-redundancy product codes for burst error correction," in IEEE Transactions on Information Theory, vol. 44, no. 4, pp. 1395-1406, July 1998.
    • (1998) IEEE Transactions on Information Theory , vol.44 , Issue.4 , pp. 1395-1406
    • Roth, R.M.1    Seroussi, G.2
  • 27
    • 13444257792 scopus 로고    scopus 로고
    • The burst error correcting capabilities of a simple array code
    • DOI 10.1109/TIT.2004.840890
    • D. Raphaeli, "The burst error correcting capabilities of a simple array code," IEEE Transactions on Information Theory, vol. 51, no. 2, pp. 722-728, Feb. 2005. (Pubitemid 40211079)
    • (2005) IEEE Transactions on Information Theory , vol.51 , Issue.2 , pp. 722-728
    • Raphaeli, D.1
  • 28
    • 0025430465 scopus 로고
    • Family of efficient burst-correcting array codes
    • DOI 10.1109/18.54888
    • M. Blaum, "A family of efficient burst-correcting array codes," IEEE Transactions on Information Theory, vol. 36, no. 3, pp. 671-675, May 1990. (Pubitemid 20713757)
    • (1990) IEEE Transactions on Information Theory , vol.36 , Issue.3 , pp. 671-675
    • Blaum, M.1
  • 29
    • 84985823803 scopus 로고
    • A survey of array error control codes
    • Sep.-Oct.
    • P.G. Farrell, "A survey of array error control codes,"European Transactions on Telecommunications, vol. 3, no. 5, pp. 441-454, Sep.-Oct. 1992.
    • (1992) European Transactions on Telecommunications , vol.3 , Issue.5 , pp. 441-454
    • Farrell, P.G.1
  • 31
    • 29344453384 scopus 로고    scopus 로고
    • Cache and memory error detection, correction, and reduction techniques for terrestrial servers and workstations
    • DOI 10.1109/TDMR.2005.856487
    • C.W. Slayman, "Cache and memory error detection, correction, and reduction techniques for terrestrial servers and workstations," IEEE Transactions on Device and Materials Reliability, vol. 5, no. 3, pp. 397-404, Sep. 2005. (Pubitemid 43003059)
    • (2005) IEEE Transactions on Device and Materials Reliability , vol.5 , Issue.3 , pp. 397-404
    • Slayman, C.W.1
  • 33
    • 33144454816 scopus 로고    scopus 로고
    • Investigation of multi-bit upsets in a 150 nm technology SRAM device
    • DOI 10.1109/TNS.2005.860675
    • D. Radaelli, H. Puchner, S. Wong, and S. Daniel, "Investigation of multi-bit upsets in a 150 nm technology SRAM device," IEEE Transactions on Nuclear Science, vol. 52, no. 6, pp. 2433-2437, Dec. 2005. (Pubitemid 43269622)
    • (2005) IEEE Transactions on Nuclear Science , vol.52 , Issue.6 , pp. 2433-2437
    • Radaelli, D.1    Puchner, H.2    Wong, S.3    Daniel, S.4
  • 35
    • 34250882322 scopus 로고    scopus 로고
    • Stochastic communication: A new paradigm for fault-tolerant networks-on-chip
    • P. Bogdan, T. Dumitras, and R. Marculescu, "Stochastic communication: A new paradigm for fault-tolerant networks-on-chip," Proc. VLSI Design, 2007.
    • Proc. VLSI Design, 2007
    • Bogdan, P.1    Dumitras, T.2    Marculescu, R.3
  • 37
    • 77953890052 scopus 로고    scopus 로고
    • Modeling yield, cost, and quality of an NoC with uniformly and nonuniformly distributed redundancy
    • Apr.
    • S. Shamshiri and K.-T. Cheng, "Modeling yield, cost, and quality of an NoC with uniformly and nonuniformly distributed redundancy," Proc. IEEE VLSI Test Symposium (VTS), pp. 194-199, Apr. 2010.
    • (2010) Proc. IEEE VLSI Test Symposium (VTS) , pp. 194-199
    • Shamshiri, S.1    Cheng, K.-T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.