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Volumn 2003-January, Issue , 2003, Pages 225-232
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Towards on-chip fault-tolerant communication
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Author keywords
[No Author keywords available]
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Indexed keywords
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
CMOS INTEGRATED CIRCUITS;
COMPUTER AIDED DESIGN;
DESIGN;
DISTRIBUTED COMPUTER SYSTEMS;
FAULT TOLERANCE;
MICROPROCESSOR CHIPS;
PROGRAMMABLE LOGIC CONTROLLERS;
STOCHASTIC MODELS;
STOCHASTIC SYSTEMS;
SYSTEM-ON-CHIP;
SYSTEMS ANALYSIS;
CMOS TECHNOLOGY;
COMMUNICATION PARADIGM;
DEEP SUB-MICRON;
FAILURE PATTERNS;
FAULT TOLERANT COMMUNICATIONS;
HIGH-LEVEL MODELING;
RANDOMIZED ALGORITHMS;
SYSTEM ON CHIP DESIGN;
INTEGRATED CIRCUIT DESIGN;
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EID: 84954417739
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ASPDAC.2003.1195021 Document Type: Conference Paper |
Times cited : (130)
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References (17)
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