Yield and cost analysis of a reliable NoC

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2009, Pages 173-178

  Shamshiri, Saeed ^a   Cheng, Kwang Ting ^a  

^a University of California   (United States)

Author keywords

Burn in elimination; Cost optimization; Distributed redundancy; NoC; SoC; Spare enhanced resiliency; Yield analysis

Indexed keywords

BURN-IN ELIMINATION; COST OPTIMIZATION; DISTRIBUTED REDUNDANCY; NOC; SOC; SPARE-ENHANCED RESILIENCY; YIELD ANALYSIS;

COST ACCOUNTING; COSTS; ELECTRIC NETWORK TOPOLOGY; PROGRAMMABLE LOGIC CONTROLLERS; QUALITY ASSURANCE; REDUNDANCY; RELIABILITY ANALYSIS; ROUTERS;

COST BENEFIT ANALYSIS;

EID: 70350350023     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2009.34     Document Type: Conference Paper

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