Characterization of dynamic SRAM stability in 45 nm CMOS

IEEE Journal of Solid-State Circuits

Volumn 46, Issue 11, 2011, Pages 2702-2712

  Toh, Seng Oon ^a,b   Guo, Zheng ^c   Liu, Tsu Jae King ^b   Nikolić, Borivoje ^b  

^a ADVANCED MICRO DEVICES   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c INTEL CORPORATION   (United States)

Author keywords

Dynamic stability; NBTI; pulsed word line; RTN; SRAM; variability

Indexed keywords

BITCELL; ENHANCED SENSITIVITY; FUTURE TECHNOLOGIES; NBTI; NEGATIVE BIAS TEMPERATURE INSTABILITY; PROCESS VARIATION; PULSED WORD-LINE; RANDOM TELEGRAPH NOISE; READ MARGIN; RTN; SOURCES OF VARIABILITY; SRAM STABILITY; STATIC AND DYNAMIC; SUPPLY VOLTAGES; VARIABILITY; WRITE MARGIN;

FAILURE ANALYSIS; SENSITIVITY ANALYSIS; TELEGRAPH;

STABILITY;

EID: 80255131381     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2011.2164300     Document Type: Conference Paper

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