Characterization of bit transistors in a functional SRAM

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2008, Pages 44-45

  Deng, Xiaowei ^a   Loh, Wah Kit ^a   Pious, Beena ^a   Houston, Theodore W ^a   Liu, Larry ^a   Khan, Bashar ^a   Corum, Dan ^a   Raval, Jayesh ^a   Gertas, John ^a   Rousey, Foong Ying ^a   Steck, Johnny ^a   Suwannakinthorn, Chupong ^a   McKee, Randy ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

QUALITY ASSURANCE; RELIABILITY; SAFETY FACTOR; STATIC RANDOM ACCESS STORAGE; VLSI CIRCUITS;

MASSIVE DATA; MEASURED DATA; STATISTICAL ANALYSIS; TRANSISTOR MISMATCH;

FAILURE ANALYSIS;

EID: 51949090523     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2008.4585945     Document Type: Conference Paper

References (2)

1. V. K. Wong, et al., "Electrical analysis to fault isolate defects in 6T memory cells," IPFA, 2002, pp. 101-104.
2. M. Khellah, et al., "Effect of power supply noise on SRAM dynamic stability," Symp. VLSI Circuits, 2007, pp. 76-77.