6.6+ GHz Low Vmin, read and half select disturb-free 1.2 Mb SRAM

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2007, Pages 250-251

  Joshi, R ^a   Houle, R ^a   Batson, K ^a   Rodko, D ^a   Patel, P ^a   Huott, W ^a   Franch, R ^a   Chan, Y ^a   Plass, D ^a   Wilson, S ^a   Wang, P ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

OPERATING RANGE;

SPEED; VLSI CIRCUITS;

STATIC RANDOM ACCESS STORAGE;

EID: 39749154813     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2007.4342738     Document Type: Conference Paper

References (5)