Application-aware NoC design for efficient SDRAM access

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 30, Issue 10, 2011, Pages 1521-1533

  Jang, Wooyoung ^a,b   Pan, David Z ^a  

^a The University of Texas at Austin   (United States)

^b SAMSUNG Electronics   (South Korea)

Author keywords

Access granularity; flow control; memory; networks on chip; quality of service; router

Indexed keywords

ACCESS GRANULARITY; BEST-EFFORT; DATA SIZE; HYBRID FLOW; MEMORY; MEMORY ACCESS; MEMORY LATENCIES; MEMORY PERFORMANCE; MEMORY SUBSYSTEMS; MEMORY UTILIZATION; NETWORKS ON CHIPS; NOC DESIGN; PRIORITY SERVICE; SERVICE ROUTERS; SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORIES; SYSTEMS ON CHIPS;

DESIGN; FLOW CONTROL; MICROPROCESSOR CHIPS; QUALITY OF SERVICE; ROUTERS;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 80053254416     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2011.2160176     Document Type: Article

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