Memory-aware NoC exploration and design

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2008, Pages 1128-1129

  Dutt, Nikil ^a  

^a 5226 Donald Bren Hall   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 49749090404     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2008.4484829     Document Type: Conference Paper

References (4)

1. G. De Micheli and L. Benini, Networks on Chips, Morgan Kaufmann, San Francisco, CA, 2006.
2. S. Pasricha and N. Dutt, On-Chip Communication Architectures: System on Chip Interconnect, Morgan Kaufmann, San Francisco, CA, 2008.
3. I. Issenin and N. Dutt, "Data Reuse Driven Memory and NoC Co-Synthesis," Proc. 2007 International Embedded Systems Symposium (IESS 2007), May 2007.
4. N. Dutt, F. Kurdahi, A. Eltawil and S. Nassif "Cross-Layer Approaches to Designing Reliable Systems using Unreliable Chips", All-day tutorial, ASPDAC 2008, January 2008.