A practical approach of memory access parallelization to exploit multiple off-chip DDR memories

Proceedings - Design Automation Conference

Volumn , Issue , 2008, Pages 447-452

  Kwon, Woo Cheol ^a   Yoo, Sungjoo ^a   Hong, Sung Min ^a   Min, Byeong ^a   Choi, Kyu Myung ^a   Eo, Soo Kwan ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

And arbitration; Memory; Parallelization

Indexed keywords

AND ARBITRATION; DDR MEMORIES; MEMORY; PARALLELIZATION;

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER NETWORKS; DIGITAL INTEGRATED CIRCUITS; DIGITAL TELEVISION; ELECTRIC NETWORK TOPOLOGY; INDUSTRIAL ENGINEERING;

DATA STORAGE EQUIPMENT;

EID: 51549105349     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2008.4555859     Document Type: Conference Paper

References (15)

1. F. Li, et. al., "Design and Management of 3D Chip Multiprocessors Using Network-in-Memory", Proc. ISCA, 2006.
2. L. Hsu, et. al., "Exploring the Cache Design Space for Large Scale CMPs", SIGARCH Computer Architecture News, pp. 24-33, 33(4), 2005.
3. S. Borkar, "Thousand-Core Chips - A Technology Perspective", Proc. DAC, 2007.
4. B. So, M. W. Hall and H. E. Ziegler, "Custom Data Layout for Memory Parallelism", Proc. International Symposium on Code Generation and Optimization, 2004.
5. B. Mathew, S. McKee, J. Carter, and A. Davis, "Design of a parallel vector access unit for SDRAM memory systems", Proc. HPCA, 1999.
6. K. Kim and V. K. Prasanna, "Latin square for parallel array access", IEEE Trans. on Parallel and Distributed Systems, 4(4), April 1993.
7. M. Franklin and G. S. Sohi, "ARB: A Hardware Mechanism for Dynamic Reordering of Memory References", IEEE Trans. on Computers, 45(5), May 1996.
8. Sonics MemMAX 2.0 Datasheet, available at www.sonicsinc.com.
9. AMBA3 protocol and Fabric IPs, available at http://www.arm.com/products/ index.html.
10. T. Ezaki, et. al., "A 160Gb/s Interface Design Configuration for Multichip LSI", Proc. ISSCC, 2004.
11. D. Mosberger, "Memory Consistency Models", Operating Systems Review, 17(1), Jan. 1993.
12. DesignWare® IP Solutions for AMBA™ Infrastructure & Fabric, available at www.synopsys.com.
13. W. Kwon, et. al., "An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication", Proc. DATE, 2008.
14. Y. Lin, "Design Challenge of a QuadHDTV Video Decoder", MPSoC School, 2007, available at tima.imag.fr/mpsoc.
15. A. Harris, et. al., "Bus deadlock avoidance", United States Patent 7219178, 2007.