Electrothermal effects in high density through silicon via (TSV) arrays

Progress in Electromagnetics Research

Volumn 115, Issue , 2011, Pages 223-242

  Zhao, W S ^a   Wang, X P ^a   Yin, W Y ^a  

^a ZHEJIANG UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; ELECTRIC HEATING; ELECTRIC NETWORK ANALYSIS; ELECTRONICS PACKAGING; EQUIVALENT CIRCUITS; FINITE ELEMENT METHOD; INTEGRATED CIRCUIT INTERCONNECTS; INTEGRATED CIRCUIT MANUFACTURE; POLYCRYSTALLINE MATERIALS; SILICON; SUBSTRATES; TIME DOMAIN ANALYSIS;

CHARACTERISTIC IMPEDANCE; ELECTRO-THERMAL EFFECTS; EQUIVALENT LUMPED-ELEMENT CIRCUIT MODELS; HIGH-RESISTIVITY SILICON SUBSTRATE; PARTIAL-ELEMENT EQUIVALENT-CIRCUIT METHODS; POLYCRYSTALLINE SILICON (POLY-SI); THROUGH-SILICON-VIA (TSV); TIME-DOMAIN FINITE ELEMENT METHODS;

THREE DIMENSIONAL INTEGRATED CIRCUITS;

EID: 79955547869     PISSN: 10704698     EISSN: 15598985     Source Type: Journal    
DOI: 10.2528/PIER11030503     Document Type: Article

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