Electrical modeling of through silicon and package vias

2009 IEEE International Conference on 3D System Integration, 3DIC 2009

Volumn , Issue , 2009, Pages

  Bandyopadhyay, Tapobrata ^a   Chatterjee, Ritwik ^a   Chung, Daehyun ^a   Swaminathan, Madhavan ^a   Tummala, Rao ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALYTICAL MODELING; DESIGN GUIDELINES; ELECTRICAL MODELING; ELECTRICAL MODELS; ELECTRICAL PERFORMANCE; ELECTROMAGNETIC SIMULATION; EM SIMULATIONS; HIGH FREQUENCY HF; PARAMETRIC STUDY; THROUGH-SILICON-VIA;

CAPACITANCE; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SIMULATORS;

THREE DIMENSIONAL;

EID: 70549111064     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/3DIC.2009.5306542     Document Type: Conference Paper

References (12)

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