Slow wave and dielectric quasi-TEM modes of metal-insulator-semiconductor (MIS) structure through silicon via (TSV) in signal propagation and power delivery in 3D chip package

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2010, Pages 667-672

  Pak, Jun So ^a   Cho, Jonghyun ^a   Kim, Joohee ^a   Lee, Junho ^b   Lee, Hyungdong ^b   Park, Kunwoo ^b   Kim, Joungho ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^b Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP PACKAGES; ELECTRICAL CHARACTERISTIC; ELECTRICAL PERFORMANCE; FULL-WAVE SIMULATIONS; INSULATOR THICKNESS; MEASURED RESULTS; METAL INSULATOR SEMICONDUCTOR STRUCTURES; METAL-INSULATOR-SEMICONDUCTORS; MIS STRUCTURE; ON-CHIP METALS; POWER DELIVERY; QUASI-TEM; SIGNAL PROPAGATION; SLOW WAVE; THROUGH-SILICON-VIA;

CUSTOMER SATISFACTION; ELECTRIC POWER TRANSMISSION; METAL INSULATOR BOUNDARIES; MIS DEVICES; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR INSULATOR BOUNDARIES;

THREE DIMENSIONAL;

EID: 77955201755     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2010.5490799     Document Type: Conference Paper

References (7)

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4. H. Hasegawa, et al, "Properties of Microstrip Line on Si- SiO2 System," IEEE Tans. on Microwave Theory and Techniques, Vol.MTT-19, No.11, Nov. 1971.
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6. J. Kim, et al, "Through Silicon Via (TSV) Equalizer," Proc. 18th conference on Electrical Performance of Electronic Packaging and Systems, Portland (Tigard), Oregon, Aug. 2009.
7. J. S. Pak, et al, "Sharing Power Distribution Networks for Enhanced Power Integrity by using Through-Silicon-Via," Proc. the 2008 Electrical Design Advanced Packaging & Systems, Seoul, Korea, Dec. 2008.