Compact AC modeling and performance analysis of through-silicon vias in 3-D ICs

IEEE Transactions on Electron Devices

Volumn 57, Issue 12, 2010, Pages 3405-3417

  Xu, Chuan ^a   Li, Hong ^a   Suaya, Roberto ^b   Banerjee, Kaustav ^a  

^a University of California   (United States)

^b MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

3 D IC; Carbon nanotube (CNT); complex conductivity; interconnect; resistance inductance capacitance conductance (RLCG) model; thermal analysis; through silicon via (TSV)

Indexed keywords

3-D IC; COMPLEX CONDUCTIVITY; INTERCONNECT; RESISTANCE-INDUCTANCE-CAPACITANCE-CONDUCTANCE (RLCG) MODEL; THERMAL ANALYSIS; THROUGH-SILICON VIA;

CAPACITANCE; CARBON NANOTUBES; EDDY CURRENTS; ELECTRIC CONDUCTORS; ELECTRONICS PACKAGING; INDUCTANCE; INTEGRATED CIRCUITS; SEMICONDUCTING SILICON; THERMOANALYSIS; THERMODYNAMIC STABILITY;

THREE DIMENSIONAL;

EID: 78650018928     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2010.2076382     Document Type: Article

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