Temperature dependent electrical characteristics of Through-Si-Via (TSV) interconnections

2010 IEEE International Interconnect Technology Conference, IITC 2010

Volumn , Issue , 2010, Pages

  Katti, G ^b   Mercha, A ^a   Stucchi, M ^a   Tokei, Zs ^a   Velenis, D ^a   Van Olmen, J ^a   Huyghebaert, C ^a   Jourdain, A ^a   Rakowski, M ^a   Debusschere, I ^a   Soussan, P ^a   Oprins, H ^a   Dehaene, W ^b   De Meyer, K ^b   Travaly, Y ^a   Beyne, E ^a   Biesemans, S ^a   Swinnen, B ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

3D ICs; Thermal behavior; Through Silicon Via (TSV)

Indexed keywords

3-D ICS; C-V CHARACTERISTIC; CAPACITANCE CHANGE; ELECTRICAL BEHAVIORS; ELECTRICAL CHARACTERISTIC; HIGHER TEMPERATURES; OXIDE CHARGE; RING OSCILLATOR; TEMPERATURE DEPENDENT; THERMAL BEHAVIORS; THROUGH SILICON VIA (TSV); VARYING TEMPERATURE;

CIRCUIT SIMULATION; OSCILLATORS (ELECTRONIC); THREE DIMENSIONAL;

CAPACITANCE;

EID: 77955625176     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2010.5510311     Document Type: Conference Paper

References (12)

1. E. Beyne, Proceedings 4th International Symposium on Microelectronics and Packaging, Seoul, South Korea,Sep. 28, 2005.
2. B. Swinnen et al., IEDM 2006, pp. 371-374.
3. Jan Van Olmen et al., IEDM 2008, pp. 603-616.
4. Anne Jourdain et al., ECTC 2009, pp. 11-13.
5. G. Katti et al., IEDM 2009, pp. 357-360.
6. A. Rahman et. al., Proceedings of the IEEE International Interconnect Conference, 2001, p. 157.
7. th Jul. 2006.
8. G. Katti et al., "Through Silicon Via (TSV) Capacitance reduction Technique to benefit 3-D IC performance", communicated to EDL.
9. S. M. Sze, Physics of Semiconductor Devices. Wiley, 1981.
10. R. Castagne et. al., Surf. Sci. 28, 157-193, Nov. 1971.
11. G. Katti, et. al., TED, Jan 2010, pp: 256-262.
12. Spectre Circuit Simulator Reference (Cadence), Jun. 2008.