Nonvolatile memory with Ge/Si heteronanocrystals as floating gate

IEEE Transactions on Nanotechnology

Volumn 10, Issue 2, 2011, Pages 284-290

  Li, Bei ^a   Liu, Jianlin ^a  

^a University of California Riverside   (United States)

Author keywords

Ge Si self assembly; MOSFET; nanocrystal (NC) memory

Indexed keywords

CHANNEL MEMORY; ELECTRON STORAGE; FLOATING GATES; FOWLER-NORDHEIM; GE/SI SELF-ASSEMBLY; HETERONANOCRYSTALS; HOT CARRIER INJECTION; MEMORY PERFORMANCE; MOSFET; NANOCRYSTAL (NC) MEMORY; NON-VOLATILE MEMORIES; SELECTIVE GROWTH; STORAGE CAPABILITY;

CHEMICAL VAPOR DEPOSITION; GERMANIUM; HOT CARRIERS; MOSFET DEVICES; NANOCRYSTALS; SELF ASSEMBLY; SILICON;

STATIC RANDOM ACCESS STORAGE;

EID: 79952639901     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2009.2039488     Document Type: Article

References (33)

1. S. Tiwari, F. Rana, K. Chan, H. Hanafi, W. Chan, and D. Buchanan, "Volatile and nonvolatile memories in silicon with nano-crystal storage," in Proc. IEDM Tech. Dig., 1995, pp. 521-524.
2. S. Tiwari, R. Rana, K. Chan, L. Shi, and H. Hanafi, "Single charge and confinement effects in nano-crystal memories," Appl. Phys. Lett., vol. 69, pp. 1232-1234, Aug. 1996. (Pubitemid 126595646)
3. R. Muralidhar, R. F. Steimle, M. Sadd, R. Rao, C. T. Swift, E. J. Prinz, J. Yater, L. Grieve, K. Harber, B. Hradsky, S. Straub, B. Acred, W. Paulson, W. Chen, L. Parker, S. G. H. Anderson, M. Rossow, T. Merchant, M. Paransky, T. Huynh, D. Hadad, K. M. Chang, and B. E. White, Jr., "A 6 V embedded 90 nm silicon nanocrystal nonvolatile memory," in Proc. IEDM Tech. Dig., 2003, pp. 26.2.1-26.2.4.
4. G. Puzzilli and F. Irrera, "Data retention of silicon nanocrystal storage nodes programmed with short voltage pulses," IEEE Trans. Electron Devices, vol. 53, no. 4, pp. 775-781, Apr. 2006.
5. C. Y. Ng, T. P. Chen, M. Yang, J. B. Yang, L. Ding, C. M. Li, A. Du, and A. Trigg, "Impact of programming mechanisms on the performance and reliability of nonvolatile memory devices based on Si nanocrystals," IEEE Trans. Electron Devices, vol. 53, no. 4, pp. 663-667, Apr. 2006.
6. Y. C. King, T. J. King, and C. Hu, "MOS memory using germanium nanocrystals formed by thermal oxidation of Si1-xGex ," in Proc. IEDM Tech. Dig., 1998, pp. 115-118.
7. M. She and T. J. King, "Impact of crystal size and tunnel dielectric on semiconductor nanocrystal memory performance," IEEE Trans. Electron Devices, vol. 50, no. 9, pp. 1934-1940, Sep. 2003.
8. B. H. Koh, E. W. H. Kan, W. K. Chim, W. K. Choi, D. A. Antoniadis, and E. A. Fitzgerald, "Traps in germanium nanocrystal memory and effect on charge retention: Modeling and experimental measurements," J. Appl. Phys., vol. 97, pp. 124305-1-124305-9, Jun. 2005.
9. D. T. Zhao, Y. Zhu, R. G. Li, and J. L. Liu, "Cobalt silicide nanocrystal memory," in Proc. Device Res. Conf. Dig., 2005, pp. 105-106.
10. 2 nanocrystals embedded in silicon dioxide layer," Appl. Phys. Lett., vol. 87, pp. 193504-1-193504-3, Nov. 2005.
11. P. K. Singh, K. K. Singh, R. Hofmann, K. Argstrong, N. Krishna, and S. Mahapatra, "Au nanocrystal memory reliability and failure analysis," in Proc. IPFA 2008, Jul., pp. 1-5.
12. 2 as blocking oxide," Appl. Phys. Lett., vol. 90, pp. 132102-1-132102-3, Mar. 2007.
13. 2 high-κ tunneling dielectric," in Proc. VLSI Symp. Tech.Dig., 2003, pp. 33-34.
14. B. Li, J. L. Liu, G. F. Liu, and J. A. Yarmoff, "Ge/Si heteronanocrystal floating gate memory," Appl. Phys. Lett., vol. 91, pp. 132107-1-132107-3, Sep. 2007.
15. H. G. Yang, Y. Shi, L. Pu, R. Zhang, B. Shen, P. Han, S. L. Gu, and Y. D. Zheng, "Nonvolatile memory based on Ge/Si hetero-nanocrystals," Appl. Surf. Sci., vol. 224, no. 1-4, pp. 394-398, Mar. 2004.
16. D. T. Zhao, Y. Zhu, R. G. Li, and J. L. Liu, "Simulation of a Ge-Si heteronanocrystal memory," IEEE Trans. Nanotechnol., vol. 5, no. 1, pp. 37-41, Jan. 2006.
17. Y. Zhu, D. T. Zhao, and J. L. Liu, "Numerical investigation of transient capacitances of Ge/Si heteronanocrystal memories in retention mode," J. Appl. Phys., vol. 101, pp. 034508-1-034508-4, Feb. 2007.
18. F. M. Yang, T. C. Chang, P. T. Liu, P. H. Yeh, U. S. Chen, Y. C. Yu, J. Y. Liu, S. M. Sze, and J. C. Lou, "Using double layer CoSi2 nanocrystals to improve the memory effects of nonvolatile memory devices," Appl. Phys. Lett., vol. 90, pp. 212108-1-212108-3, May 2007.
19. Y. Zhu, B. Li, J. L. Liu, G. F. Liu, and Y. A. Yarmoff, "TiSi2 /Si heteronanocrystal metal-oxide-semiconductor-field-effect-transistor memory," Appl. Phys. Lett., vol. 89, pp. 233113-1-233113-3, Dec. 2006.
20. W. Guan, S. Long, M. Liu, Q. Liu, Y. Hu, Z. Li, and R. Jia, "Modeling of retention characteristics for metal and semiconductor nanocrystal memories," Solid-State Electron., vol. 51, pp. 806-811, May 2007. (Pubitemid 46766655)
21. M. She and T. J. King, "Impact of crystal size and tunnel dielectric on semiconductor nanocrystal memory performance," IEEE Trans. Electron Devices, vol. 50, no. 9, pp. 1934-1940, Sep. 2003.
22. Y. M. Niquet, G. Allan, C. Delerue, and M. Lannoo, "Quantum confinement in germanium nanocrystals," Appl. Phys. Lett., vol. 77, pp. 1182-1184, Aug. 2000.
23. T. van Buuren, L. N. Dinh, L. L. Chase, W. J. Siekhaus, and L. J. Terminello, "Changes in the electronic properties of Si nanocrystals as a function of particle size," Phys. Rev. Lett., vol. 80, no. 17, pp. 3803-3806, Apr. 1998. (Pubitemid 128629849)
24. C. Bostedt, T. van Buuren, T. M. Willey, N. Franco, L. J. Terminello, C. Heske, and T. Moller, "Strong quantum-confinement effects in the conduction band of germanium nanocrystals," Appl. Phys. Lett., vol. 84, no. 20, pp. 4056-4058, May 2004.
25. J.-H. Zhu, K. Brunner, and G. Abstreiter, "Two-dimensional ordering of self-assembled Ge islands on vicinal Si(001) surfaces with regular ripples," Appl. Phys. Lett., vol. 73, no. 5, pp. 620-622, Aug. 1998. (Pubitemid 128673862)
26. T. Kamins and R. Williams, "Lithographic positioning of self-assembled Ge islands on Si(001)," Appl. Phys. Lett., vol. 71, no. 9, pp. 1201-1203, Sep. 1997. (Pubitemid 127655648)
27. 2 nanotemplate using solid source molecular beam epitaxy," Appl. Phys. Lett., vol. 83, no. 24, pp. 5032-5034, Dec. 2003.
28. K. Sumitomo, F. Lin, Y. Homma, and T. Ogino, "Selective formation of Ge nanostructures on Si (111) surface with patterned steps," Appl. Surf. Sci., vol. 237, no. 1-4, pp. 68-74, Oct. 2004.
29. 2 /Si substrate by molecular beam epitaxy," Appl. Phys. Lett., vol. 89, pp. 063107-1-063107-7, Aug. 2006.
30. E. S. Kim, N. Usami, and Y. Shiraki, "Control of Ge dots in dimension and position by selective epitaxial growth and their optical properties," Appl. Phys. Lett., vol. 72, no. 13, pp. 1617-1619, Mar. 1998. (Pubitemid 128671408)
31. 2 films," Surface Sci., vol. 496, no. 1-2, pp. L7-L12, Jan. 2002. (Pubitemid 33143445)
32. Y. Shi, K. Saito, H. Ishikuro, and T. Hiramoto, "Characteristics of narrow channel MOSFET memory based on silicon nanocrystals," Jpn. J. Appl. Phys., vol. 38, no. 4B, pp. 2453-2456, Apr. 1999. (Pubitemid 129697734)
33. J. T. Park, J. Y. Chun, H. K. Kim, S. J. Jang, and C. G. Yu, "New programming and erasing schemes for p-channel flash memory," IEEE Electron Device Lett., vol. 21, no. 10, pp. 491-493, Oct. 2000.