메뉴 건너뛰기




Volumn 1, Issue 3, 2010, Pages 232-241

Architecture exploration of crossbar-based nanoscale reconfigurable computing platforms

Author keywords

Nano architecture; Nanoelectronics; Nanotechnology

Indexed keywords

ARCHITECTURE EXPLORATION; CARBON NANOTUBE TRANSISTORS; CMOSFETS; COMPUTING PLATFORM; COMPUTING SYSTEM; DEVICE INTEGRATION; FLOATING GATE TRANSISTORS; LOGIC DENSITY; LOGIC FAMILIES; NANO SCALE; NANO-ARCHITECTURE; POWER CONSUMPTION; RE-CONFIGURABLE; RECONFIGURABILITY; RECONFIGURABLE COMPUTING; RECONFIGURABLE LOGIC; REGULAR STRUCTURE; SELF-ASSEMBLED; SPICE SIMULATIONS; STANFORD; STATIC LOGIC;

EID: 78649689602     PISSN: 18787789     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.nancom.2010.09.003     Document Type: Article
Times cited : (7)

References (36)
  • 1
    • 55349100919 scopus 로고    scopus 로고
    • Automated removal of metallic carbon nanotubes in a nanotube ensemble by electrical breakdown, in: Proc. IEEE Conference on Nanotechnology
    • I. Amlani, N. Pimparkar, K. Nordquist, D. Lim, S. Clavijo, Z. Qian, R. Emrick, Automated removal of metallic carbon nanotubes in a nanotube ensemble by electrical breakdown, in: Proc. IEEE Conference on Nanotechnology, 2008, pp. 239-242.
    • (2008) , pp. 239-242
    • Amlani, I.1    Pimparkar, N.2    Nordquist, K.3    Lim, D.4    Clavijo, S.5    Qian, Z.6    Emrick, R.7
  • 2
    • 84962860005 scopus 로고    scopus 로고
    • A fine-grained reconfigurable logic array based on double gate transistors, in: International Conference on Field-Programmable Technology
    • P. Beckett, A fine-grained reconfigurable logic array based on double gate transistors, in: International Conference on Field-Programmable Technology, 2002, pp. 260-267.
    • (2002) , pp. 260-267
    • Beckett, P.1
  • 3
    • 78649708553 scopus 로고
    • A very high-speed field programmable gate array using metal-to-metal anti-fuse programmable elements, in: New Hardware Product Introduction at Custom Integrated Circuits Conference.
    • J. Birkner, A. Chan, H.T. Chua, et al. A very high-speed field programmable gate array using metal-to-metal anti-fuse programmable elements, in: New Hardware Product Introduction at Custom Integrated Circuits Conference, 1991.
    • (1991)
    • Birkner, J.1    Chan, A.2    Chua, H.T.3
  • 4
    • 0141499770 scopus 로고    scopus 로고
    • Array-based architecture for fet-based, nanoscale electronics
    • DeHon A. Array-based architecture for fet-based, nanoscale electronics. IEEE Trans. Nanotechnology 2003, 2(1):23-32.
    • (2003) IEEE Trans. Nanotechnology , vol.2 , Issue.1 , pp. 23-32
    • DeHon, A.1
  • 5
    • 2442424176 scopus 로고    scopus 로고
    • Nanowire-based sublithographic programmable logic arrays, in: Proc. FPGA,
    • A. DeHon, M.J. Wilson, Nanowire-based sublithographic programmable logic arrays, in: Proc. FPGA, 2004, pp. 123-132.
    • (2004) , pp. 123-132
    • DeHon, A.1    Wilson, M.J.2
  • 6
    • 11944274018 scopus 로고    scopus 로고
    • Low-voltage swing logic circuits for a pentium 4 processor integer core
    • Deleganes D.J., Barany M., Geannopoulos G., et al. Low-voltage swing logic circuits for a pentium 4 processor integer core. IEEE J. Solid-State Circuits 2005, 40(1):36-43.
    • (2005) IEEE J. Solid-State Circuits , vol.40 , Issue.1 , pp. 36-43
    • Deleganes, D.J.1    Barany, M.2    Geannopoulos, G.3
  • 7
    • 36849074165 scopus 로고    scopus 로고
    • A compact spice model for carbon nanotube field effect transistors including non-idealities and its application part ii: full device model and circuits performance benchmarking
    • Deng J., Wong H.-S.P. A compact spice model for carbon nanotube field effect transistors including non-idealities and its application part ii: full device model and circuits performance benchmarking. IEEE Trans. Electron Devices 2007.
    • (2007) IEEE Trans. Electron Devices
    • Deng, J.1    Wong, H.-S.P.2
  • 8
    • 0001405799 scopus 로고    scopus 로고
    • Nonvolatile memory and programmable logic from molecule-gated nanowires
    • Duan X., Huang Y., Lieber C.M. Nonvolatile memory and programmable logic from molecule-gated nanowires. Nano Lett. 2002, 2(5):487-490.
    • (2002) Nano Lett. , vol.2 , Issue.5 , pp. 487-490
    • Duan, X.1    Huang, Y.2    Lieber, C.M.3
  • 9
    • 9244243065 scopus 로고    scopus 로고
    • The design of DNA self-assembled computing circuitry
    • Dwyer C., Vicci L., Poulton J., et al. The design of DNA self-assembled computing circuitry. IEEE Trans. VLSI Syst. 2004, 12(11):1214-1220.
    • (2004) IEEE Trans. VLSI Syst. , vol.12 , Issue.11 , pp. 1214-1220
    • Dwyer, C.1    Vicci, L.2    Poulton, J.3
  • 10
    • 0034845496 scopus 로고    scopus 로고
    • Nanofabrics: spatial computing using molecular electronics, in: Proc. International Symposium on Computer Architecture
    • S.C. Goldstein, M. Budiu, Nanofabrics: spatial computing using molecular electronics, in: Proc. International Symposium on Computer Architecture, 2001, pp. 178-191.
    • (2001) , pp. 178-191
    • Goldstein, S.C.1    Budiu, M.2
  • 12
    • 34248360702 scopus 로고    scopus 로고
    • High-performance electronics using dense, perfectly aligned arrays of single-walled carbon nanotubes
    • Kang S.J., Kocabas C., Ozel T., et al. High-performance electronics using dense, perfectly aligned arrays of single-walled carbon nanotubes. Nature Nanotechnology 2007, 2:230-236.
    • (2007) Nature Nanotechnology , vol.2 , pp. 230-236
    • Kang, S.J.1    Kocabas, C.2    Ozel, T.3
  • 13
    • 78649713895 scopus 로고
    • Fpga area vs. cell granularity - lookup tables and pla cells, in: First ACM Workshop on Field-Programmable Gate Arrays, FPGA
    • J. Kouloheris, A. El Gamal, Fpga area vs. cell granularity - lookup tables and pla cells, in: First ACM Workshop on Field-Programmable Gate Arrays, FPGA, 1992, pp. 9-14.
    • (1992) , pp. 9-14
    • Kouloheris, J.1    El Gamal, A.2
  • 14
    • 0015206785 scopus 로고
    • On a pin versus block relationship for partitions of logic graphs
    • Landman B.S., Russo R.L. On a pin versus block relationship for partitions of logic graphs. IEEE Trans. Comput. 1971, C-20:1469-1479.
    • (1971) IEEE Trans. Comput. , vol.C-20 , pp. 1469-1479
    • Landman, B.S.1    Russo, R.L.2
  • 15
    • 64549147038 scopus 로고    scopus 로고
    • Reconfigurable double gate carbon nanotube transistor based nanoelectronic architecture, in: Proc. Asian and South Pacific Design Automation Conference
    • B. Liu, Reconfigurable double gate carbon nanotube transistor based nanoelectronic architecture, in: Proc. Asian and South Pacific Design Automation Conference, 2009, pp. 853-858.
    • (2009) , pp. 853-858
    • Liu, B.1
  • 16
    • 78649695020 scopus 로고    scopus 로고
    • B. Liu, Defect mapping and adaptive configuration of nanoelectronic circuits based on a CNT crossbar nano-architecture, in: Workshop on Nano, Molecular, and Quantum Communications, NanoCom, 2009.
    • B. Liu, Defect mapping and adaptive configuration of nanoelectronic circuits based on a CNT crossbar nano-architecture, in: Workshop on Nano, Molecular, and Quantum Communications, NanoCom, 2009.
  • 17
    • 67649640013 scopus 로고    scopus 로고
    • Adaptive voltage controlled nanoelectronic addressing for yield, accuracy and resolution, in: Proc. Intl. Symp. on Quality Electronic Design,
    • B. Liu, Adaptive voltage controlled nanoelectronic addressing for yield, accuracy and resolution, in: Proc. Intl. Symp. on Quality Electronic Design, 2009, pp. 430-435.
    • (2009) , pp. 430-435
    • Liu, B.1
  • 18
    • 36348984319 scopus 로고    scopus 로고
    • Gaffiot, Design of a novel CNTFET-based econfigurable logic gate, in: Proc. Intl. Symp. VLSI,
    • J. Liu, I. O'Connor, D. Navarro, F. Gaffiot, Design of a novel CNTFET-based reconfigurable logic gate, in: Proc. Intl. Symp. VLSI, 2007, pp. 285-290.
    • (2007) , pp. 285-290
    • Liu, J.I.1    O'Connor, D.2    Navarro, F.3
  • 20
    • 34548138865 scopus 로고    scopus 로고
    • Assessing the implications of process variations on future carbon nanotube bundle interconnect solutions, in: Proc. Intl. Symp. on Quality Electronic Design,
    • A. Nieuwoudt, Y. Massoud, Assessing the implications of process variations on future carbon nanotube bundle interconnect solutions, in: Proc. Intl. Symp. on Quality Electronic Design, 2007, pp. 119-126.
    • (2007) , pp. 119-126
    • Nieuwoudt, A.1    Massoud, Y.2
  • 21
    • 21644458275 scopus 로고    scopus 로고
    • Spintronics materials and devices: past, present and future, in: IEEE International Electron Devices Meeting, IEDM Technical Digest,
    • S.S.P. Parkin, Spintronics materials and devices: past, present and future, in: IEEE International Electron Devices Meeting, IEDM Technical Digest, 2004, pp. 903-906.
    • (2004) , pp. 903-906
    • Parkin, S.S.P.1
  • 23
    • 34547456541 scopus 로고    scopus 로고
    • A defect tolerant self-organizing nanoscale simd architecture, in: International Conference on Architecture Support for Programming Languages and Operating Systems,
    • J.P. Patwardhan, V. Johri, C. Dwyer, A.R. Lebeck, A defect tolerant self-organizing nanoscale simd architecture, in: International Conference on Architecture Support for Programming Languages and Operating Systems, 2006, pp. 241-251.
    • (2006) , pp. 241-251
    • Patwardhan, J.P.1    Johri, V.2    Dwyer, C.3    Lebeck, A.R.4
  • 26
    • 64549116334 scopus 로고    scopus 로고
    • Carbon nanotube electronics: design of high performance and low power digital circuits
    • Raychowdhury A., Roy K. Carbon nanotube electronics: design of high performance and low power digital circuits. IEEE Trans. Circuits Syst. 2007, 54(11):2391-2401.
    • (2007) IEEE Trans. Circuits Syst. , vol.54 , Issue.11 , pp. 2391-2401
    • Raychowdhury, A.1    Roy, K.2
  • 27
    • 78649692730 scopus 로고    scopus 로고
    • Design approaches for hybrid cmos/molecular memory based on experimental device data, in: Proc. Great Lakes Symp. VLSI,
    • G.S. Rose, A.C. Cabe, N. Gergel-Hackett, et al. Design approaches for hybrid cmos/molecular memory based on experimental device data, in: Proc. Great Lakes Symp. VLSI, 2007, pp. 119-126.
    • (2007) , pp. 119-126
    • Rose, G.S.1    Cabe, A.C.2    Gergel-Hackett, N.3
  • 28
    • 18744368092 scopus 로고    scopus 로고
    • Nano-scale silicon structures by using carbon nanotubes as reactive ion masks
    • Schmidt M.S., Nielsen T., Madsen D.N., Kristensen A., Bggild P. Nano-scale silicon structures by using carbon nanotubes as reactive ion masks. Nanotechnology 2005, 16:750-753.
    • (2005) Nanotechnology , vol.16 , pp. 750-753
    • Schmidt, M.S.1    Nielsen, T.2    Madsen, D.N.3    Kristensen, A.4    Bggild, P.5
  • 30
    • 33846807711 scopus 로고    scopus 로고
    • Nano/CMOS architectures using a field-programmable nanowire interconnect
    • Snider G.S., Williams R.S. Nano/CMOS architectures using a field-programmable nanowire interconnect. Nanotechnology 2007, 18(3).
    • (2007) Nanotechnology , vol.18 , Issue.3
    • Snider, G.S.1    Williams, R.S.2
  • 31
    • 17444366307 scopus 로고    scopus 로고
    • Molecular electronics: from devices and interconnect to circuits and architecture
    • Stan M.R., Franzon P.D., Goldstein S.C., Lach J.C., Ziegler M.M. Molecular electronics: from devices and interconnect to circuits and architecture. Proc. IEEE 2003, 91(11):1940-1957.
    • (2003) Proc. IEEE , vol.91 , Issue.11 , pp. 1940-1957
    • Stan, M.R.1    Franzon, P.D.2    Goldstein, S.C.3    Lach, J.C.4    Ziegler, M.M.5
  • 32
    • 18744373862 scopus 로고    scopus 로고
    • CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices
    • Strukov D.B., Likharev K.K. CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices. Nanotechnology 2005, 16(6):888-900.
    • (2005) Nanotechnology , vol.16 , Issue.6 , pp. 888-900
    • Strukov, D.B.1    Likharev, K.K.2
  • 33
    • 0000756513 scopus 로고    scopus 로고
    • Resonant tunneling diodes: models and properties
    • Sun J.P., Haddad G.I., Mazumder P., Schulman J.N. Resonant tunneling diodes: models and properties. Proc. IEEE 1998, 86(4):641-660.
    • (1998) Proc. IEEE , vol.86 , Issue.4 , pp. 641-660
    • Sun, J.P.1    Haddad, G.I.2    Mazumder, P.3    Schulman, J.N.4
  • 34
    • 0842287323 scopus 로고    scopus 로고
    • Monolithic integration of carbon nanotube devices with silicon MOS technology
    • Tseng Y.-C., Xuan P., Javey A., Malloy R., Wang Q., Bokor J., Dai H. Monolithic integration of carbon nanotube devices with silicon MOS technology. Nano Lett. 2004, 4(1):123-127.
    • (2004) Nano Lett. , vol.4 , Issue.1 , pp. 123-127
    • Tseng, Y.-C.1    Xuan, P.2    Javey, A.3    Malloy, R.4    Wang, Q.5    Bokor, J.6    Dai, H.7
  • 35
    • 34547222125 scopus 로고    scopus 로고
    • Nature: a hybrid nanotube/cmos dynamically reconfigurable architecture, in: Proc. ACM/IEEE Design Automation Conf.
    • W. Zhang, N.K. Jha, L. Shang, Nature: a hybrid nanotube/cmos dynamically reconfigurable architecture, in: Proc. ACM/IEEE Design Automation Conf., 2006, pp. 711-716.
    • (2006) , pp. 711-716
    • Zhang, W.1    Jha, N.K.2    Shang, L.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.