Low-voltage swing logic circuits for a Pentium® 4 processor integer core

IEEE Journal of Solid-State Circuits

Volumn 40, Issue 1, 2005, Pages 36-42

  Deleganes, Daniel J ^a   Barany, Micah ^a   Geannopoulos, George ^a   Kreitzer, Kurt ^a   Morrise, Matthew ^a   Milliron, Dan ^a   Singh, Anant P ^a   Wijeratne, Sapumal ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Adders; Integrated circuit design; Microprocessors

Indexed keywords

ADDERS; CACHE MEMORY; ELECTRIC CLOCKS; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POTENTIAL; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS;

ADDRESS GENERATION UNITS (AGU); ARITHMETIC LOGIC UNITS (ALU); CLOCK FREQUENCY; SEQUENTIAL ELEMENTS;

LOGIC CIRCUITS;

EID: 11944274018     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.838020     Document Type: Conference Paper

References (8)

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2. S. Thompson et al., "A 90 nm technology featuring 50 nm strained silicon channel transistors...," in IEDM Tech. Dig., 2002, pp. 61-64.
3. D. Deleganes et al., "Low-voltage-swing logic circuits for a 7GHz ×86 integer core," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2004, p. 154.
4. J. Schutz and C. Webb, "A scalable x86 CPU design for 90 nm process," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2004, p. 62.
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6. M. Morrise et al., "Algorithm for finding vectors to stimulate all paths and arcs through an LVS gate," U.S. Patent 6,557,149, Apr. 29, 2003.
7. A. Singh et al., "A mixed signal rotator/shifter for 8GHz Intel Pentium 4 integer core," in Symp. VLSI Circuits, June 2004, pp. 394-397.
8. D. Deleganes et al., "LVS technology for the Intel Pentium 4 processor on 90 nm technology," Intel Technol. J., Feb. 2004.