The equivalent-thickness concept for doped symmetric DG MOSFETs

IEEE Transactions on Electron Devices

Volumn 57, Issue 11, 2010, Pages 2917-2924

  Sallese, Jean Michel ^a   Chevillon, Nicolas ^b   Prégaldiny, Fabien ^b,c   Lallement, Christophe ^b   Iñiguez, Benjamin ^d  

^a EPFL   (Switzerland)

^b UNIVERSITÉ DE STRASBOURG   (France)

^c LSIIT   (France)

^d UNIVERSITAT ROVIRA I VIRGILI   (Spain)

Author keywords

FETs; semiconductor device modeling

Indexed keywords

ANALYTICAL MODEL; DG MOSFETS; DOUBLE GATE MOSFET; FETS; PHYSICAL PARAMETERS; SEMICONDUCTOR DEVICE MODELING; SILICON CHANNEL; SILICON THICKNESS; TECHNOLOGY COMPUTER AIDED DESIGN; THRESHOLD VOLTAGE SHIFTS; UNIFIED MODEL;

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; GALERKIN METHODS; MATHEMATICAL MODELS; MESFET DEVICES; MOSFET DEVICES; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR SWITCHES; THRESHOLD VOLTAGE;

DOPING (ADDITIVES);

EID: 78049254415     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2010.2071090     Document Type: Article

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