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Volumn 52, Issue 5, 2008, Pages 830-837

Modeling of potentials and threshold voltage for symmetric doped double-gate MOSFETs

Author keywords

Doped double gate MOSFET; Double gate modeling; Double gate potentials

Indexed keywords

COMPUTER SIMULATION; CONCENTRATION (PROCESS); DOPING (ADDITIVES); ELECTRIC CURRENTS; GATE DIELECTRICS; MATHEMATICAL MODELS; THRESHOLD VOLTAGE;

EID: 41449102638     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2007.10.046     Document Type: Article
Times cited : (70)

References (15)
  • 2
    • 41449114053 scopus 로고    scopus 로고
    • Int. Tech. Roadmap for Semiconductors, ed.; 2005.
    • Int. Tech. Roadmap for Semiconductors, ed.; 2005.
  • 3
    • 26644442791 scopus 로고    scopus 로고
    • A comparative study of electrical characteristic on sub-10-nm double-gate MOSFETs
    • Li Y., and Chou H.-M. A comparative study of electrical characteristic on sub-10-nm double-gate MOSFETs. IEEE Trans Nanotechnol 4 5 (2005) 645-647
    • (2005) IEEE Trans Nanotechnol , vol.4 , Issue.5 , pp. 645-647
    • Li, Y.1    Chou, H.-M.2
  • 5
    • 0029209413 scopus 로고
    • Moderate inversion model of ultra-thin double-gate nMOS/SOI transistors
    • Francis P., Terao A., Flandre D., and Van de Wiele F. Moderate inversion model of ultra-thin double-gate nMOS/SOI transistors. Solid-State Electron 38 1 (1995) 171-176
    • (1995) Solid-State Electron , vol.38 , Issue.1 , pp. 171-176
    • Francis, P.1    Terao, A.2    Flandre, D.3    Van de Wiele, F.4
  • 6
    • 0033732282 scopus 로고    scopus 로고
    • An analytycal solution to a double-gate MOSFET with undoped body
    • Taur Y. An analytycal solution to a double-gate MOSFET with undoped body. IEEE Electron Dev Lett 21 5 (2000) 245-247
    • (2000) IEEE Electron Dev Lett , vol.21 , Issue.5 , pp. 245-247
    • Taur, Y.1
  • 7
    • 0141940281 scopus 로고    scopus 로고
    • A physical compact model of DG MOSFET for mixed-signal circuit applications-part I: model description
    • Pei G., Ni W., Kammula A.V., Minch B.A., and Kan E.C.-C. A physical compact model of DG MOSFET for mixed-signal circuit applications-part I: model description. IEEE Trans Electron Dev 50 10 (2003) 2135-2143
    • (2003) IEEE Trans Electron Dev , vol.50 , Issue.10 , pp. 2135-2143
    • Pei, G.1    Ni, W.2    Kammula, A.V.3    Minch, B.A.4    Kan, E.C.-C.5
  • 8
    • 1342286939 scopus 로고    scopus 로고
    • A continuous analytic drain-current model for DG MOSFETs
    • Taur Y., Liang X., Wang W., and Lu H. A continuous analytic drain-current model for DG MOSFETs. IEEE Electron Dev Lett 25 2 (2004) 107-109
    • (2004) IEEE Electron Dev Lett , vol.25 , Issue.2 , pp. 107-109
    • Taur, Y.1    Liang, X.2    Wang, W.3    Lu, H.4
  • 10
    • 13644258469 scopus 로고    scopus 로고
    • Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs
    • Ortiz-Conde A., Garcia Sanchez F.J., and Muci J. Rigorous analytic solution for the drain current of undoped symmetric dual-gate MOSFETs. Solid-State Electron 49 (2005) 640-647
    • (2005) Solid-State Electron , vol.49 , pp. 640-647
    • Ortiz-Conde, A.1    Garcia Sanchez, F.J.2    Muci, J.3
  • 11
    • 12344336837 scopus 로고    scopus 로고
    • A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism
    • Sallese J.-M., Krummenacher F., Pregaldiny F., Lallement C., Roy A., and Enz C. A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism. Solid-State Electron 49 March (2005) 485-489
    • (2005) Solid-State Electron , vol.49 , Issue.March , pp. 485-489
    • Sallese, J.-M.1    Krummenacher, F.2    Pregaldiny, F.3    Lallement, C.4    Roy, A.5    Enz, C.6
  • 13
    • 0025484482 scopus 로고
    • Numerical and charge sheet models for thin-film SOI MOSFET's
    • Mallikarjun C., and Bhat K.N. Numerical and charge sheet models for thin-film SOI MOSFET's. IEEE Trans Electron Dev 37 9 (1990) 2039-2051
    • (1990) IEEE Trans Electron Dev , vol.37 , Issue.9 , pp. 2039-2051
    • Mallikarjun, C.1    Bhat, K.N.2
  • 14
    • 23944500159 scopus 로고    scopus 로고
    • Effects of substrate doping on the linearly extrapoled threshold voltage of symmetrical DG MSO devices
    • Shi X., and Wong M. Effects of substrate doping on the linearly extrapoled threshold voltage of symmetrical DG MSO devices. IEEE Trans Electron Dev 52 7 (2005) 1616-1621
    • (2005) IEEE Trans Electron Dev , vol.52 , Issue.7 , pp. 1616-1621
    • Shi, X.1    Wong, M.2
  • 15
    • 41449115864 scopus 로고    scopus 로고
    • Cerdeira A, Iñiguez B, Estrada M. Compact model for short channel symmetric doped double-gate MOSFETs. Solid-State Electron, submitted for publication.
    • Cerdeira A, Iñiguez B, Estrada M. Compact model for short channel symmetric doped double-gate MOSFETs. Solid-State Electron, submitted for publication.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.