Degradation of III-V inversion-type enhancement-mode MOSFETs

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2010, Pages 536-542

  Wrachien, N ^a   Cester, A ^a   Zanoni, E ^a   Meneghesso, G ^a   Wu, Y Q ^b   Ye, P D ^b  

^a UNIVERSITY OF PADOVA   (Italy)

^b PURDUE UNIVERSITY   (United States)

Author keywords

III V MOSFET; Reliability; Stress

Indexed keywords

DETRIMENTAL EFFECTS; ENHANCEMENT-MODE; HARD BREAKDOWN; HIGH ELECTRIC FIELDS; HIGH-CURRENT; III-V MOSFET; INTERFACE TRAP GENERATION; LOW FREQUENCY; MOSFETS; RAMP VOLTAGE; RANDOM TELEGRAPH NOISE; SOFT BREAKDOWN; SUBTHRESHOLD SLOPE; TRAPPED CHARGE;

ELECTRIC FIELDS; MOSFET DEVICES; TELEGRAPH;

RELIABILITY;

EID: 77957920690     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2010.5488775     Document Type: Conference Paper

References (41)

1. R. Chau, S. Datta, and A. Majumdar, "Opportunities and challenges of III-V nanoelectronics for future high speed, low power logic applications," in Proc. IEEE CSIC Tech. Dig., 2005, pp. 17-20.
2. 'Process integration, devices, and structures' in 'International technology roadmap for semiconductors', 2007, ITRS. p. 3-4, www.itrs.net.
3. Semiconductor Research Corporation website: www.src.org.
4. H. Becke, R. Hall, and J. White, "Gallium arsenide MOS transistors," Solid-State Electronics., Vol. 8, pp. 813-823, 1965.
5. T. Ito and Y. Sakai, "The GaAs inversion-type MIS transistors," Solid-State Electronics., Vol. 17, no. 7, pp. 751-759, 1974.
6. B. Bayraktaroglu, E. Kohn, and H. L. Hartnagel, "First anodic-oxide GaAs M.O.S.F.E.T.S based on easy technological processes," Electronics Lett., Vol. 12, no. 2, pp. 53-54, 1976.
7. A. Colquhoun, E. Kohn, and H. L. Hartnagel, "Improved enhancement/ depletion GaAs MOSFET using anodic oxide as the gate insulator," IEEE Trans. Elec. Dev., Vol. 25, pp. 375-376, Mar. 1978.
8. T. Mimura, K. Odani, N. Yokoyama, and M. Fukuta, "New structure of enhancement-mode GaAs microwave M.O.S.F.E.T.," Electron. Lett., Vol. 14, no. 16, pp. 500-502, 1978.
9. T. Mimura, K. Odani, N. Yokoyama, Y. Nakayama, and M. Fukuta, "GaAs microwave MOSFETs," IEEE Trans. Elec. Dev., Vol. 25, pp. 573-579, June 1978.
10. K. Kamimura and Y. Sakai, "The properties of GaAs-Al O and InP-Al O interfaces and the fabrication of MIS field-effect transistors," Thin Solid Films, Vol. 56, pp. 215-223, 1979.
11. G. G. Fountain, R. A. Rudder, S. V. Hattangady, R. J. Markunas, and J. A. Hutchby, "Demonstration of an n-channel inversion mode GaAs MISFET," in IEDM Tech. Dig., Dec. 1989, pp. 887-889.
12. 3) as gate oxide," in Proc. Mater. Res. Soc. Symp., 1999, vol. 573, pp. 219-225.
13. M. Passlack, J. K. Abrokwah, R. Droopad, Z. Yu, C. Overgaard, S. I. Yi, M. Hale, J. Sexton, and A. C. Kummel, "Self-aligned GaAs p-channel enhancement mode MOS heterostructure field-effect transistor," IEEE Electron Device Lett., Vol. 23, no. 9, pp. 508-510, Sep. 2002.
14. M. Hale, S.I. Yi, J.Z. Sexton, A.C. Kummel, and M. Passlack, "Scanning Tunneling Microscopy and Spectroscopy of Gallium Oxide Deposition and Oxidation on GaAs(001)-c(27times;8)/(2×4)", J. Chemical Physics, Vol. 119, no. 13, pp. 6719-6728, 2003.
15. Z. Yu, C. M. Overgaard, R. Droopad, M. Passlack, and J. K. Abrokwah, "Growth and physical properties of GaO thin films on GaAs(001) substrate by molecular-beam epitaxy," Appl. Phys. Lett., Vol. 82, no. 18, pp. 2978-2980, May 2003.
16. M. Passlack, R. Droopad, K. Rajagopalan, J. Abrokwah, R. Gregory, D. Nguyen, "High Mobility NMOSFET Structure with High-K Dielectric," IEEE Electron. Dev. Lett., Vol. 26, no. 10, pp. 713-715, 2005.
17. 2/Vs for Use in High-K Dielectric NMOSFETs," Solid State Electronics, Vol. 50, no.7-8, pp. 1175-1177, 2006.
18. Y. Xuan, H. C. Lin, P. D. Ye, and G. D. Wilk, "Capacitance-voltage studies on enhancement-mode InGaAs metal-oxide-semiconductor field-effecttransistor using atomic-layer-deposited Al2O3 gate dielectric," Appl. Phys. Lett., Vol. 88, no. 26, pp. 263518-263520, Jun. 2006.
19. K. Rajagopalan, J. Abrokwah, R. Droopad, and M. Passlack, "Enhancement-mode GaAs n-channel MOSFET," IEEE Electron Devices Lett., Vol. 27, no. 12, pp. 959-962, Dec. 2006.
20. I. Ok et al., "Self-Aligned n- and p-channel GaAs MOSFETs on undoped and p-type substrates using HfO2 and silicon interface passivation layer," in IEDM Tech. Dig., Dec. 2006, pp. 829-832.
21. K. Rajagopalan et al., "1-μm enhancement mode GaAs n-channel MOSFETs with transconductance exceeding 250 mS/mm," IEEE Electron Devices Lett., Vol. 28, no. 2, pp. 100-102, Feb. 2007.
22. 0.48As MOSFETs with high-k gate dielectrics," IEEE Electron Devices Lett., Vol. 28, no. 6, pp. 473-475, Jun. 2007.
23. 3 as gate dielectric," Appl. Phys. Lett., Vol. 91, no. 21, pp. 212101-212103, Nov. 2007.
24. 3 as gate dielectric," IEEE Electron Devices Lett., Vol. 28, no. 11, pp. 935-938, Nov. 2007.
25. 2, HfAlO as gate dielectrics," in IEDM Tech. Dig., Dec. 2007, pp. 637-640.
26. M. Passlack, R. Droopad, K. Rajagopalan, J. Abrokwah, P. Zurcher; P. Fejes, "High Mobility III-V Mosfet Technology,". IEEE Compound Semiconductor Integrated Circuit Symposium, 2006. CSIC 2006, pp.3942, Nov. 2006
27. 2/V.s, and Transconductance of Over 475 μS/μm," IEEE Electron Device Letters, vol. 28, No. 12, pp. 1080-1082, Dec. 2007
28. 0.25As MOSFET," IEEE Electron Device Letters, vol. 30, No. 7, pp. 700-702, July 2009.
29. 3/GaAs MOSFET" Microelectronics Reliability, Vol 47, pp. 2082-2087, 2007.
30. 3 MOSFET", in IEDM Tech. Dig., Dec. 2008, pp 379-382.
31. A. Cester, L. Bandiera, G. Ghidini, I. Bloom, and A. Paccagnella, "Soft Breakdown Current Noise in Ultra-thin Gate Oxides," Solid-State Electronics, Vol. 46, p. 1019-1025, 2002.
32. 2 films under constant current stress. IEEE Trans. Elec. Dev., vol 46 no. 1, pp. 159-164, 1999.
33. M. Depas, T. Nigam and M.M. Heyns, Soft breakdown of ultra-thin gate oxide layers. IEEE T Electron Dev 439 (1996), pp. 1499-1504.
34. 3/Pt devices," Surface & Coatings Technology 203 (2008) 628-631.
35. 2 thin films," Appl. Phys. Lett. 90, 242-906 2007.
36. 3 on GaAs," Appl. Phys. Lett. 87, 182904, 2005.
37. 3 films grownby atomic layer deposition on silicon and various metal substrates," Thin Solid Films 413 (2002) 186-197.
38. S. C. Sun and J. D. Plummer, "Electron Mobility in Inversion and Accumulation Layers on Thermally Oxidised Silicon Surfaces," IEEE Trans. Electron Dev. ED-27, 1497 (1980).
39. M. Passlack, "OFF-State Current Limits of Narrow Bandgap MOSFETs," IEEE Trans. Elec. Dev., Vol. 53, 2006, pp. 2773-2778.
40. P. S. Winokur, J. R. Schwank, P. J. McWhorter, P. V. Dressendorfer, and D. C. Turpin, "Correlating the Radiation Response of MOS Capacitors and Transistors," IEEE Trans. Nuc. Sci. W, 1453 (1984).
41. P. J. McWhorter and P. S. Winokur, "Simple Technique for Separating the Effects of Interface Traps and Trapped-Oxide Charge in Metal-Oxide- Semiconductor Transistors," Appl. Phys. Lett. 48, 133 (1986).