Multiple transient faults in combinational and sequential circuits: A systematic approach

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 29, Issue 10, 2010, Pages 1614-1627

  Miskov Zivanov, Natasa ^a   Marculescu, Diana ^b  

^a UNIVERSITY OF PITTSBURGH SCHOOL OF MEDICINE   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Logic circuits; reliability; symbolic manipulation; transient faults

Indexed keywords

CIRCUIT OPTIMIZATION; DESIGN PROCESS; ERROR RATE; FAN-OUT; FUTURE TECHNOLOGIES; MULTIPLE BIT UPSET; MULTIPLE FAULTS; ORDERS OF MAGNITUDE; OUTPUT ERRORS; PROTECTION TECHNIQUES; RADIATION-INDUCED; SIMULTANEOUS FAULTS; SINGLE RADIATION; SYMBOLIC MANIPULATION; TRANSIENT FAULTS;

FORMAL METHODS; LOGIC DESIGN; PROBABILITY; RELIABILITY; SWITCHING CIRCUITS;

LOGIC CIRCUITS;

EID: 77957004425     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2010.2061131     Document Type: Article

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