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Volumn , Issue , 2006, Pages 497-501
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Soft error derating computation in sequential circuits
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Author keywords
[No Author keywords available]
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Indexed keywords
ACCURATE ESTIMATION;
BISTABLES;
COMPUTER-AIDED DESIGN;
EXPERIMENTAL RESULTS;
EXPONENTIAL INCREASE;
INTERNATIONAL CONFERENCES;
KEY FACTORS;
MONTE CARLO SIMULATION (MCS);
ORDERS-OF-MAGNITUDE;
SOFT ERROR TOLERANT DESIGN;
SOFT ERRORS;
SOFT ERRORS (SE);
SOFT-ERROR RATE (SER);
STATIC TIMING ANALYSIS (STA);
SYSTEM FAILURES;
COST EFFECTIVENESS;
DESIGN;
ERROR ANALYSIS;
ERROR CORRECTION;
ERRORS;
ESTIMATION;
LOGIC CIRCUITS;
MICROPROCESSOR CHIPS;
MOBILE TELECOMMUNICATION SYSTEMS;
PROBABILITY;
RANDOM PROCESSES;
RISK ASSESSMENT;
SEQUENTIAL CIRCUITS;
STATIC ANALYSIS;
SYSTEMS ENGINEERING;
TIME MEASUREMENT;
COMPUTER SYSTEMS;
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EID: 46149091986
PISSN: 10923152
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ICCAD.2006.320164 Document Type: Conference Paper |
Times cited : (38)
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References (8)
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