Soft-error tolerance analysis and optimization of nanometer circuits

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn I, Issue , 2005, Pages 288-293

  Dhillon, Yuvraj Singh ^a   Diril, Abdulkadir Utku ^a   Chatterjee, Abhijit ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL CAPACITY; DELAY CIRCUITS; GATES (TRANSISTOR); OPTIMIZATION; SPURIOUS SIGNAL NOISE; THRESHOLD VOLTAGE;

ATMOSPHERIC NEUTRON STRIKES; CHANNEL LENGTHS; NANOMETER CIRCUITS; SOFT ERROR;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 33646909420     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.274     Document Type: Conference Paper

References (11)

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