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Volumn , Issue , 2010, Pages 156-161

Efficient simulation-based debugging of reversible logic

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN ERRORS; DNA-COMPUTING; EFFICIENT SIMULATION; EMERGING TECHNOLOGIES; FORMAL VERIFICATIONS; GATE INPUT; INPUT PATTERNS; LOW-POWER DESIGN; OPTICAL COMPUTING; ORDERS OF MAGNITUDE; QUANTUM COMPUTING; RESEARCH AREAS; REVERSIBLE CIRCUITS; REVERSIBLE LOGIC; SIMULATION-BASED; SPEED-UPS;

EID: 77955316006     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISMVL.2010.37     Document Type: Conference Paper
Times cited : (4)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.