Gate-level simulation of quantum circuits

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2003-January, Issue , 2003, Pages 295-301

  Viamontes, G F ^a   Rajagopalan, M ^a   Markov, I L ^a   Hayes, J P ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SOFTWARE; MATRIX ALGEBRA; QUANTUM COMPUTERS; QUANTUM ELECTRONICS; QUANTUM OPTICS; RECONFIGURABLE HARDWARE;

DECISION DIAGRAM; GATE LEVEL SIMULATION; GROVER'S ALGORITHM; QUANTUM CIRCUIT; QUANTUM COMPUTING; QUANTUM INFORMATION; QUANTUM OPERATORS; SIMULATION TECHNIQUE;

QUANTUM THEORY;

EID: 84954408169     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2003.1195031     Document Type: Conference Paper

References (17)

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