-
2
-
-
34748841353
-
Elementary gates for quantum computation
-
A. Barenco, C. H. Bennett, R. Cleve, D. P. DiVincenzo, N. H. Margolus, P. W. Shor, T. Sleator, J. A. Smolin, and H. Weinfurter. Elementary gates for quantum computation. APS Physical Review A, 52(5):3457-3467, 1995.
-
(1995)
APS Physical Review A
, vol.52
, Issue.5
, pp. 3457-3467
-
-
Barenco, A.1
Bennett, C.H.2
Cleve, R.3
DiVincenzo, D.P.4
Margolus, N.H.5
Shor, P.W.6
Sleator, T.7
Smolin, J.A.8
Weinfurter, H.9
-
3
-
-
34748841353
-
Elementary gates for quantum computation
-
A. Barenco, C. H. Bennett, R. Cleve, D. P. DiVinchenzo, N. Margolus, P. Shor, T. Sleator, J. A. Smolin, and H. Weinfurter. Elementary gates for quantum computation. APS Physical Review A, 52:3457-3467, 1995.
-
(1995)
APS Physical Review A
, vol.52
, pp. 3457-3467
-
-
Barenco, A.1
Bennett, C.H.2
Cleve, R.3
DiVinchenzo, D.P.4
Margolus, N.5
Shor, P.6
Sleator, T.7
Smolin, J.A.8
Weinfurter, H.9
-
4
-
-
0032624124
-
Design of experiments in CAD: Context and new data sets for ISCAS'99
-
F. Brglez and R. Drechsler. Design of experiments in CAD: Context and new data sets for ISCAS'99. In Int'l Symp. Circ. and Systems, volume VI, pages 424-427, 1999.
-
(1999)
Int'l Symp. Circ. and Systems
, vol.6
, pp. 424-427
-
-
Brglez, F.1
Drechsler, R.2
-
6
-
-
34748897094
-
Exact SAT-based Toffoli Network Synthesis
-
D. Große, X. Chen, G. Dueck, and R. Drechsler. Exact SAT-based Toffoli Network Synthesis. In Great Lakes Symp. VLSI, pages 96-101, 2007.
-
(2007)
Great Lakes Symp. VLSI
, pp. 96-101
-
-
Große, D.1
Chen, X.2
Dueck, G.3
Drechsler, R.4
-
8
-
-
33750588847
-
An algorithm for synthesis of reversible logic circuits
-
P. Gupta, A. Agrawal, and N. Jha. An algorithm for synthesis of reversible logic circuits. IEEE Trans. on CAD, 25(11):2317-2330, 2006.
-
(2006)
IEEE Trans. on CAD
, vol.25
, Issue.11
, pp. 2317-2330
-
-
Gupta, P.1
Agrawal, A.2
Jha, N.3
-
9
-
-
50449092972
-
-
H. H. Hoos and T. Stützle. SATLIB: An Online Resource for Research on SAT. In I. P. Gent, H. v. Maaren, T. Walsh, editors, SAT 2000, pages 283-292, 2000. SATLIB is available online at www.satlib.org.
-
H. H. Hoos and T. Stützle. SATLIB: An Online Resource for Research on SAT. In I. P. Gent, H. v. Maaren, T. Walsh, editors, SAT 2000, pages 283-292, 2000. SATLIB is available online at www.satlib.org.
-
-
-
-
10
-
-
33748112109
-
Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis
-
W. Hung, X. Song, G. Yang, J. Yang, and M. Perkowski. Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis. IEEE Trans. on CAD, 25(9):1652-1663, 2006.
-
(2006)
IEEE Trans. on CAD
, vol.25
, Issue.9
, pp. 1652-1663
-
-
Hung, W.1
Song, X.2
Yang, G.3
Yang, J.4
Perkowski, M.5
-
12
-
-
20444459774
-
Toffoli network synthesis with templates
-
D. Maslov, G. W. Dueck, and D. M. Miller. Toffoli network synthesis with templates. IEEE Trans. on CAD, 24(6):807-817, 2005.
-
(2005)
IEEE Trans. on CAD
, vol.24
, Issue.6
, pp. 807-817
-
-
Maslov, D.1
Dueck, G.W.2
Miller, D.M.3
-
13
-
-
0043136670
-
A transformation based algorithm for reversible logic synthesis
-
D. M. Miller, D. Maslov, and G.W. Dueck. A transformation based algorithm for reversible logic synthesis. In Design Automation Conf., pages 318-323, 2003.
-
(2003)
Design Automation Conf
, pp. 318-323
-
-
Miller, D.M.1
Maslov, D.2
Dueck, G.W.3
-
14
-
-
25544459735
-
Reversible logic and quantum computers
-
A. Peres. Reversible logic and quantum computers. APS Physical Review A, (32):3266-3276, 1985.
-
(1985)
APS Physical Review A
, vol.32
, pp. 3266-3276
-
-
Peres, A.1
-
15
-
-
0026225350
-
-
G. Reinelt. TSPLIB - A Traveling Salesman Problem Library. In ORSA Journal on Computing, 3, pages 376-384, 1991. TSPLIB is available online at www.iwr.uni-heidelberg.de/groups/comopt/software/TSPLIB95/.
-
G. Reinelt. TSPLIB - A Traveling Salesman Problem Library. In ORSA Journal on Computing, volume 3, pages 376-384, 1991. TSPLIB is available online at www.iwr.uni-heidelberg.de/groups/comopt/software/TSPLIB95/.
-
-
-
-
16
-
-
0038718548
-
Synthesis of reversible logic circuits
-
V. Shende, A. Prasad, I. Markov, and J. Hayes. Synthesis of reversible logic circuits. IEEE Trans. on CAD, 22(6):710-722, 2003.
-
(2003)
IEEE Trans. on CAD
, vol.22
, Issue.6
, pp. 710-722
-
-
Shende, V.1
Prasad, A.2
Markov, I.3
Hayes, J.4
-
17
-
-
84978092325
-
-
T. Toffoli. Reversible computing. In W. de Bakker and J. van Leeuwen, editors, Automata, Languages and Programming, page 632. Springer, 1980. Technical Memo MIT/LCS/TM-151, MIT Lab. for Comput. Sci.
-
T. Toffoli. Reversible computing. In W. de Bakker and J. van Leeuwen, editors, Automata, Languages and Programming, page 632. Springer, 1980. Technical Memo MIT/LCS/TM-151, MIT Lab. for Comput. Sci.
-
-
-
-
18
-
-
50249129397
-
Fast exact Toffoli network synthesis of reversible logic
-
R. Wille and D. Große. Fast exact Toffoli network synthesis of reversible logic. In Int'l Conf. on CAD, pages 60-64, 2007.
-
(2007)
Int'l Conf. on CAD
, pp. 60-64
-
-
Wille, R.1
Große, D.2
-
19
-
-
49749148011
-
Quantified synthesis of reversible logic
-
R. Wille, H. M. Le, G. W. Dueck, and D. Große. Quantified synthesis of reversible logic. In Design, Automation and Test in Europe, 2008.
-
(2008)
Design, Automation and Test in Europe
-
-
Wille, R.1
Le, H.M.2
Dueck, G.W.3
Große, D.4
|