A multi-level-cell bipolar-selected phase-change memory

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 428-625

  Bedeschi, Ferdinando ^a   Fackenthal, Rich ^b   Resta, Claudio ^a   Donze, Enzo Michele ^a   Jagasivamani, Meenatchi ^b   Buda, Egidio ^a   Pellizzer, Fabio ^a   Chow, David ^b   Cabrini, Alessandro ^c   Calvi, Giacomo Matteo Angelo ^c   Faravelli, Roberto ^c   Fantini, Andrea ^c   Torelli, Guido ^c   Mills, Duane ^b   Gastaldi, Roberto ^a   Casagrande, Giulio ^a  

^a STMICROELECTRONICS   (Italy)

^b INTEL CORPORATION   (United States)

^c UNIVERSITY OF PAVIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

NETWORKS (CIRCUITS); SOLID STATE DEVICES;

MULTILEVEL CELL; MULTILEVEL PROGRAMMING;

PHASE CHANGE MEMORY;

EID: 49549091783     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523240     Document Type: Conference Paper

References (10)

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