A sub-200-mV voltage-scalable SRAM with tolerance of access failure by self-activated bitline sensing

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 57, Issue 6, 2010, Pages 440-445

  Luo, Shien Chun ^a   Chiou, Lih Yih ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

Author keywords

Process; static random accessmemory; subthreshold circuit; temperature (PV T) variation; ultralow power; variation tolerance; voltage

Indexed keywords

ACCESS CONTROL; CHEMICAL ACTIVATION; DELAY CIRCUITS; ELECTRIC POTENTIAL; FAILURE (MECHANICAL); PROCESSING; VOLTAGE SCALING;

MAXIMUM OPERATING FREQUENCY; STATIC RANDOM ACCESSMEMORY; SUB-THRESHOLD CIRCUITS; SUPPLY-VOLTAGE RANGE; TIMING REFERENCES; ULTRA-LOW POWER; VARIATION TOLERANCES; WITHIN-DIE VARIATIONS;

STATIC RANDOM ACCESS STORAGE;

EID: 77953723692     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2010.2048360     Document Type: Article

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