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Volumn , Issue , 2006, Pages 497-502

Impact of process variation induced transistor mismatch on sense amplifier performance

Author keywords

[No Author keywords available]

Indexed keywords

ARSENIC COMPOUNDS; DATA STORAGE EQUIPMENT; INTEGRATED CIRCUIT MANUFACTURE;

EID: 47649124551     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ADCOM.2006.4289943     Document Type: Conference Paper
Times cited : (7)

References (11)
  • 2
    • 0026238170 scopus 로고
    • Mismatch Sensitivity of a Simultaneously Latched CMOS Sense Amplifier
    • Rahul Sarpeshkar, John L. Wyatt, Nicky C. Lu and Peter D. Gerber, "Mismatch Sensitivity of a Simultaneously Latched CMOS Sense Amplifier", IEEE Journal of Solid-State Circuits, Vol. 26, No. 10, 1991, pp. 1413-1422.
    • (1991) IEEE Journal of Solid-State Circuits , vol.26 , Issue.10 , pp. 1413-1422
    • Sarpeshkar, R.1    Wyatt, J.L.2    Lu, N.C.3    Gerber, P.D.4
  • 3
    • 47649111362 scopus 로고    scopus 로고
    • Current Sense Amplifiers: For Embedded SRAM in High Performance System-on-a-Chip Designs
    • Bernard Wicht, "Current Sense Amplifiers: for Embedded SRAM in High Performance System-on-a-Chip Designs", Springer Series in Advanced Microelectronics, vol. 12, 2003.
    • (2003) Springer Series in Advanced Microelectronics , vol.12
    • Wicht, B.1
  • 4
    • 64549083505 scopus 로고    scopus 로고
    • Sub-90nm variability is here to stay ... deal with it
    • September
    • Philippe Hurat, Yao-Ting Wang and Nishath K. Varghese, "Sub-90nm variability is here to stay ... deal with it", EDA Tech Forum, September, 2005.
    • (2005) EDA Tech Forum
    • Hurat, P.1    Wang, Y.-T.2    Varghese, N.K.3
  • 5
    • 0003994354 scopus 로고    scopus 로고
    • Characterization of MOS Transistor Mismatch for Analog Design
    • Ph. D. Thesis, Katholieke Universiteit Leuven
    • J. Bastos, "Characterization of MOS Transistor Mismatch for Analog Design" Ph. D. Thesis, Katholieke Universiteit Leuven, 1998.
    • (1998)
    • Bastos, J.1
  • 7
    • 0026142035 scopus 로고
    • A High-Speed Clamped Bit-Line Current-Mode Sense Amplifier
    • T.N. Blalock and R.C. Jaeger, "A High-Speed Clamped Bit-Line Current-Mode Sense Amplifier", IEEE Journal of Solid-State Circuits, Vol. 26, No. 4, 1991, pp. 542-548.
    • (1991) IEEE Journal of Solid-State Circuits , vol.26 , Issue.4 , pp. 542-548
    • Blalock, T.N.1    Jaeger, R.C.2
  • 9
    • 47649111886 scopus 로고    scopus 로고
    • Lecture Notes, ver. 1, Indian Institute of Science, Bangalore
    • Navakanth Bhat, "Analog and Mixed Signal VLSI Circuit Design", Lecture Notes, ver. 1, Indian Institute of Science, Bangalore, 2003.
    • (2003) Analog and Mixed Signal VLSI Circuit Design
    • Bhat, N.1
  • 10
    • 47649126134 scopus 로고    scopus 로고
    • http://www.eas.asu.edu/~ptm/


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.