Wide VDD embedded asynchronous SRAM with dual-mode self-timed technique for dynamic voltage systems

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 56, Issue 8, 2009, Pages 1657-1667

  Chang, Meng Fan ^a   Yang, Sue Meng ^a   Chen, Kung Ting ^a,b  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

Asynchronous static random access memory (SRAM); Bitline leakage; Destructive read; Timing skew

Indexed keywords

EMBEDDED SYSTEMS; SYSTEM-ON-CHIP;

BITLINE LEAKAGES; CONVENTIONAL SENSE; DESTRUCTIVE READ; FUNCTIONAL FAILURE; STATIC RANDOM ACCESS MEMORY; SYSTEM ON A CHIP; TEMPERATURE CONDITIONS; TIMING SKEW;

STATIC RANDOM ACCESS STORAGE;

EID: 69449085255     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.2010101     Document Type: Article

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