SECS: A new single-electron-circuit simulator

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 55, Issue 9, 2008, Pages 2774-2784

  Zardalidis, George ^a   Karafyllidis, Ioannis G ^a  

^a DEMOCRITUS UNIVERSITY OF THRACE   (Greece)

Author keywords

Coulomb blockade; Monte Carlo method; Single electron box; Single electron simulation; Single electron transistor (SET); Single electron tunneling; Single electron double junction; Single electronics

Indexed keywords

CIRCUIT SIMULATION; COULOMB BLOCKADE; ELECTRON TUNNELING; ELECTRONS; INTEGRATED CIRCUITS; MONTE CARLO METHODS; STOCHASTIC SYSTEMS; TIMING CIRCUITS;

SINGLE ELECTRON BOX; SINGLE ELECTRON SIMULATION; SINGLE ELECTRON TUNNELING; SINGLE ELECTRONICS; SINGLE-ELECTRON DOUBLE JUNCTION;

SINGLE ELECTRON TRANSISTORS;

EID: 56349101920     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.920070     Document Type: Article

References (51)

1. R. E. Cavicchi and R. H. Silsbee, "Coulomb suppression of tunneling rate from small metal particles," Phys. Rev. Lett., vol. 52, pp. 1453-1456, 1984.
2. C. Wasshuber, "About single electron devices and circuits," Ph.D. dissertation, Faculty of Elect. Eng. and Inf. Technol., Tech. Univ. ofWien, Wien, Germany, 1997.
3. H. Iwai, "CMOS downsizing toward sub-10 nm," Solid State Electron. vol. 48, pp. 497-503, 2004.
4. P. Naulleau, K. A. Goldberg, J. P. Cain, E. H. Anderson, K. R. Dean, P. Denham, B. Hoef, and K. H. Jackson, "Extreme ultraviolet lithography capabilities at the advanced light source using a 0.3-NA optic," IEEE J. Quantum Electron., vol. 42, no. 1, pp. 497-503, Jan. 2006.
5. The International Technology Roadmap for Semiconductors Semiconductor Indestry Association, San Jose, CA Online. Available: http:// public.itrs.net
6. N. M. Zimmerman, W. H. Huber, A. Fujiwara, and Y. Takahashi, "Excellent charge offset stability in a Si-based single-electron tunneling transistor," Appl. Phys. Lett., vol. 79, no. 19, pp. 3188-3190, 2001.
7. D. K. Ferry, M. Khoury, C. Gerousis, M. J. Rack, A. Gunther, and S. M. Goodnick, "Single-electron charging effects in Si MOS devices," Physica E, vol. 9, pp. 69-75, 2001.
8. A. Raychowdhury, "Carbon nanotube electronics: Design of high-performance and low-power digital circuits," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 11, pp. 2391-2401, Nov. 2007.
9. S. Fujita, "3-D nanoarchitectures with carbon nanotube mechanical switches for suture on-chip network beyondCMOSarchitecture," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 11, pp. 2472-2479, Nov. 2007.
10. A. E. Kaloyeros, "Conformational molecular switches for post-CMOS nanoelectronics," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 11, pp. 2345-2352, Nov. 2007.
11. Z. A. K. Durrani, "Coulombb blockade, single-electron transistors and circuits in silicon," Physica E, vol. 17, pp. 572-578, 2003.
12. K. K. Likharev, "Single-electron devices and their applications," Proc. IEEE, vol. 87, no. 4, pp. 606-632, Apr. 1999.
13. T. A. Fulton and G. J. Dolan, "Observation of single-electron charging effects in small tunnel junction," Phys. Rev. Lett., vol. 59, pp. 109-112, 1987.
14. W. Chen, H. Ahmed, and K. Nakazoto, "Coulomb blockade at 77 K in nanoscale metallic islands in a lateral nanostructure," Appl. Phys. Lett., vol. 66, no. 24, pp. 3383-3384, 1995.
15. T. Sato, H. Ahmed, D. Brown, and B. Johnson, "Single electron transistor using a molecularly linked gold colloidal particle chain," J. Appl. Phys., vol. 82, no. 2, pp. 696-701, 1997.
16. Y. Takahashi, A. Fujiwara, M. Nagase, H. Namatsu, K. Kurihara, K. Iwadatw, and K. Murase, "Silicon single-electron devices," Int. J. Electron., vol. 85, no. 5, pp. 605-639, 1999.
17. C. Zhu, Z. Guy, L. Shang, R. P. Dicky, and R. G. Knobel, "Towards an ultra-low-power architecture using single-electron tunneling transistors," in Proc. Design Automation Conf., 2007, pp. 312-317.
18. Y. T. Tan, Z. A. Durrani, and H. Ahmed, "Electrical and structural properties of solid phase crystallized polycrystalline silicon and their correlation to single-electron effects," J. Appl. Phys., vol. 89, no. 2, pp. 1262-1270, 2001.
19. K. Nakazato, R. J. Blaikie, J. R. Cleaver, and H. Ahmed, "Single-electron memory," Electron. Lett., vol. 29, no. 4, pp. 384-385, 1993.
20. R. Augke, W. Eberhardt, C. Single, F. E. Prins, D. A. Wharam, and D. P. Kern, "Doped silicon single electron transistors with single island characteristics," Appl. Phys. Lett., vol. 76, no. 15, pp. 2065-2067, 2000.
21. L. R. C. Fonseca, A. N. Korotkov, K. K. Likharev, and A. A. Odintsov, "A numerical study of the dynamics and statistics of single electron systems," J. Appl. Phys., vol. 78, pp. 3238-3251, 1995.
22. T. Oya, Y. Takahashi, M. Ikebe, T. Asai, and Y. Amemiya, "A single-electron circuit as a discrete dynamical system," Suoerlatti. Microstruct., vol. 34, pp. 253-258, 2003.
23. R. van de Haar, R. H. Klunder, and J. Hoekstra, "SPICE model for the single electron tunnel junction," in Proc. ICECS, 2001, pp. 1445-1448.
24. A. Scholze, A. Schenk, and W. Fichtner, "Single-electron device simulation," IEEE Trans. Electron Devices, vol. 45, pp. 1811-1818, 2000.
25. J. M.Wang, "Simulation and design of nanocircuits with resonant tunneling devices," IEEE Trans. Circuits Syst. I. Reg. Papers, vol. 54, no. 6, pp. 1293-1304, Jun. 2007.
26. J. Hoekstrag, "On circuit theories for single-electron tunneling devices," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 11, pp. 2353-2359, Nov. 2007.
27. G. Zardalidis and I. Karafyllidis, "A single-electron half adder," Microelectron. J., vol. 33, pp. 265-269, 2002.
28. G. Zardalidis and I. Karafyllidis, "A single-electron full adder," IEE Proc. Circuits, Devices Syst., vol. 150, pp. 173-177, 2003.
29. G. Zardalidis and I. Karafyllidis, "Design and simulation of a nanoelectronic single-electron universal fredkin gate," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 11, pp. 2395-2403, Nov. 2004.
30. G. Zardalidis and I. Karafyllidis, "Design and simulation of a nanoelectronic single-electron control - Not gate," Microelectron. J., vol. 37, pp. 94-97, 2006.
31. I. Karafillidis, "Design and simulation of a single-electron randomaccess memory array," IEEE Trans. Circuits Syst. I, Fundam. Appl. Theory, vol. 49, no. 6, pp. 1370-1375, Jun. 2002.
32. I. Giaever and H. R. Zeller, "Superconductivity os small tin particles measured by tunneling," Phys. Rev. Lett., vol. 20, no. 26, pp. 1504-1507, 1968.
33. H. R. Zeller and I. Giaever, "Tunneling, zero bias anomalies and superconductors," Phys. Rev., vol. 181, no. 2, pp. 789-799, 1969.
34. D. V.Averin and K. K. Likharev, "Coulomb blockade of single electron tunneling, and coherent oscillations in small tunnel junctions," J. Low Temperature Phys., vol. 2, no. 3/4, pp. 345-373, 1986.
35. W. Chen and H. Ahmed, "Fabrication and physics of 2 nm islands for single electron devices," J. Vac. Sci. Technol. B, vol. 13, no. 6, pp. 2883-2887, 1995.
36. J. Hoekstra, "Towards a circuit theory for metallic single electron tunneling devices," Int. J. Circuit Theory Appl., vol. 35, pp. 213-238, 2007.
37. R. H. Klunder and J. Hoekstra, "Energy conservation in a circuit with single electron tunnel junctions," in Proc. IEEE Int. Symp. Circuits Syst., 2001, pp. 591-594.
38. C. P. Gerousis and S. M. Goodnick, "Simulation of single electron tunneling circuits," Physica Status Solidi (b), vol. 233, no. 1, pp. 113-126, 2002.
39. M. Kirihara, N. Kuwamura, K. Taniguchi, and C. Hamaguchi, "Monte Carlo study of single-electron devices," in In Extended Abstracts Int. Conf. Solid State Devices and Materials, Yokohama, Japan, 1994, pp. 328-330.
40. S. A. Roy, "Simulation tools for the analysis of single electron systems," Ph.D. dissertation, Dept. Electron. and Inf. Technol., University of Glasgow, Glasgow, U.K., 1994.
41. W. Röosner, T. Vogelsang, and L. Risch, "Simulation of single electron circuits," Microelectron. Eng., vol. 27, pp. 55-58, 1995.
42. C. Wasshuber and H. Kosina, "A single electron device and circuit simulator," Superlatt. Microstruct., vol. 21, no. 1, pp. 37-42, 1997.
43. C. Wasshuber, H. Kosina, and S. Selberherr, "Simon-A simulator for single electron tunnel devices and circuits," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 16, pp. 937-944, 1997.
44. R. H. Chen, "MOSES: A general Monte Carlo simulator for singleelectronic circuits," in Meeting Abstracts, 1996, vol. 96-2, p. 576.
45. K. Flensberg, A. A. Odintsov, F. Liefrink, and P. Teunissen, "Towards single electron metrology," Int. J. Modern Phys. B, vol. 13, pp. 2651-2685, 1999.
46. I. Karafyllidis, "A simulator for single-electron tunnel devices and circuits based on simulated annealing," Superlatt. Microstruct., vol. 25, pp. 567-572.
47. M. G. Ancona, "Design of computationally useful single-electron digital circuits," J. Appl. Phys., vol. 79, pp. 526-539, 1996.
48. F. Zhang, R. Tang, and Y. Kim, "Set-based nano-circuit simulation and design method using HSPICE," Microelectron. J., vol. 36, pp. 741-748, 2005.
49. X.Wang and W. Porod, "Single-electron transistor analytic I-V model for SPICE simulations," Superlatt. Microstruct., vol. 28, pp. 345-349, 2000.
50. G. Zardalidis and I. Karafyllidis, "Design and simulation of a nanoelectronic single-electron 2-4 decoder using a novel simulator," Microelectron. J., vol. 38, pp. 381-387, 2007.
51. R. H. Chen, A. N. Korotkov, and K. K. Likharev, "Single-electron transistor logic," Appl. Phys. Lett., vol. 68, pp. 1954-1956, 1996.