Simulation and design of nanocircuits with resonant tunneling devices

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 54, Issue 6, 2007, Pages 1293-1304

  Wang, Janet Meiling ^a   Sukhwani, Bharat ^b   Padmanabhan, Uday ^c   Ma, Dongsheng ^a   Sinha, Kartik ^a  

^a University of Arizona   (United States)

^b Boston University   (United States)

^c FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

Asynchronous; Bias based; Resonant tunneling devices; Stepwise equivalent conductance

Indexed keywords

CIRCUIT SIMULATION; CMOS INTEGRATED CIRCUITS; NANOTECHNOLOGY; RESONANT TUNNELING;

NANOCIRCUITS; NEGATIVE DIFFERENTIAL RESISTANCE; RESONANT TUNNELING DEVICES;

INTEGRATED CIRCUIT LAYOUT;

EID: 34250824039     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2007.895529     Document Type: Article

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