메뉴 건너뛰기




Volumn 35, Issue 1, 2007, Pages 1-12

Modeling and improving data cache reliability

Author keywords

Data caches; Data integrity; Reliability; Soft errors; Vulnerability factors

Indexed keywords

COMPUTER PROGRAMMING; DATA STORAGE EQUIPMENT; PROBLEM SOLVING; SOFTWARE DESIGN; SOFTWARE TESTING;

EID: 36448987927     PISSN: 01635999     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1254882.1254884     Document Type: Conference Paper
Times cited : (3)

References (32)
  • 2
    • 34548119936 scopus 로고    scopus 로고
    • SPEC
    • SPEC 2000 Benchmark. http://www.spec.org
    • (2000) Benchmark
  • 5
    • 11044221639 scopus 로고    scopus 로고
    • Triple module redundancy design techniques for virtex FPGAs
    • Nov
    • C. Carmichael. Triple module redundancy design techniques for virtex FPGAs. Xilinx Aplication Notes 197, v1.0, Nov. 2001.
    • (2001) Xilinx Aplication Notes , vol.197
    • Carmichael, C.1
  • 6
    • 0012943363 scopus 로고
    • Error-correcting codes for semiconductor memory applications: A state of the art review
    • Digital Press, 2nd Ed, pp
    • C. L. Chen and M. Y. Hsiao. Error-correcting codes for semiconductor memory applications: a state of the art review. Reliable Computer Systems - Design and Evaluation, Digital Press, 2nd Ed., pp. 771-786, 1992.
    • (1992) Reliable Computer Systems - Design and Evaluation , pp. 771-786
    • Chen, C.L.1    Hsiao, M.Y.2
  • 14
    • 9144234352 scopus 로고    scopus 로고
    • Characterization of soft errors caused by single event upsets in CMOS processes
    • June
    • T. Karnik, P. Hazucha, and J. Patel. Characterization of soft errors caused by single event upsets in CMOS processes. IEEE Trans. on Dep. and Sec. Comp, 1(2):128-143, June 2004.
    • (2004) IEEE Trans. on Dep. and Sec. Comp , vol.1 , Issue.2 , pp. 128-143
    • Karnik, T.1    Hazucha, P.2    Patel, J.3
  • 15
    • 0034856732 scopus 로고    scopus 로고
    • Cache decay: Exploiting generational behavior to reduce cache leakage power
    • S. Kaxiras, Z. Hu, and M. Martonosi. Cache decay: exploiting generational behavior to reduce cache leakage power. Int. Symp. on Comp. Arch., 2001.
    • (2001) Int. Symp. on Comp. Arch
    • Kaxiras, S.1    Hu, Z.2    Martonosi, M.3
  • 16
    • 0036926873 scopus 로고    scopus 로고
    • Soft error sensitivity characterization for microprocessor dependability enhancement strategy
    • S. Kim and A. K. Somani. Soft error sensitivity characterization for microprocessor dependability enhancement strategy. Int. Conf. on Dep. Sys. and Net., 2002.
    • (2002) Int. Conf. on Dep. Sys. and Net
    • Kim, S.1    Somani, A.K.2
  • 17
    • 33748875821 scopus 로고    scopus 로고
    • Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors
    • S. Kumar and A. Aggarwal. Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors. Int. Symp. on High-Per. Comp. Arch., 2006.
    • (2006) Int. Symp. on High-Per. Comp. Arch
    • Kumar, S.1    Aggarwal, A.2
  • 18
    • 0034461711 scopus 로고    scopus 로고
    • Eager writeback -a technique for improving bandwidth utilization
    • H. H. S. Lee, G. S. Tyson, and M. K. Farrens. Eager writeback -a technique for improving bandwidth utilization. Int. Symp. on Micro., 2000.
    • (2000) Int. Symp. on Micro
    • Lee, H.H.S.1    Tyson, G.S.2    Farrens, M.K.3
  • 20
    • 84944403418 scopus 로고    scopus 로고
    • A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor
    • Dec
    • S. S. Mukherjee, C. Weaver, J. Emer, S. K. Reinhardt, and T. Austin. A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor. Int. Symp. on Micro., Dec. 2003.
    • (2003) Int. Symp. on Micro
    • Mukherjee, S.S.1    Weaver, C.2    Emer, J.3    Reinhardt, S.K.4    Austin, T.5
  • 22
    • 0038310282 scopus 로고    scopus 로고
    • A systematic approach to SER estimation and solutions
    • H. T. Nguyen and Y. Yagil. A systematic approach to SER estimation and solutions. IEEE Int. Rel. Phys. Symp., 2003.
    • (2003) IEEE Int. Rel. Phys. Symp
    • Nguyen, H.T.1    Yagil, Y.2
  • 24
    • 0035691556 scopus 로고    scopus 로고
    • Dual use of superscalar datapath for transient-fault detection and recovery
    • J. Ray, J. Hoe, and B. Falsafi. Dual use of superscalar datapath for transient-fault detection and recovery. Int. Symp. on Micro., 2001.
    • (2001) Int. Symp. on Micro
    • Ray, J.1    Hoe, J.2    Falsafi, B.3
  • 29
    • 12344256113 scopus 로고    scopus 로고
    • Modeling the effect of transient errors on high performance microprocessors
    • March
    • N. Wang and S. Patel. Modeling the effect of transient errors on high performance microprocessors. Center for Circuits, Systems, and Software, March 2003.
    • (2003) Center for Circuits, Systems, and Software
    • Wang, N.1    Patel, S.2
  • 30
    • 4544282186 scopus 로고    scopus 로고
    • Characterizing the effects of transient faults on a high-performance processor pipeline
    • N. J. Wang, J. Quek, T. M. Rafacz, and S. J. Patel. Characterizing the effects of transient faults on a high-performance processor pipeline. Int. Conf. on Dep. Sys. and Net., 2004.
    • (2004) Int. Conf. on Dep. Sys. and Net
    • Wang, N.J.1    Quek, J.2    Rafacz, T.M.3    Patel, S.J.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.