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1
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0037292220
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Single-event upsets in microelectronics: Fundamental physics and issues
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H. H. K. Tang and K. P. Rodbell, "Single-event upsets in microelectronics: Fundamental physics and issues," MRS Bulletin, vol. 28, pp. 111-116,2003.
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Tang, H.H.K.1
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2
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3042521884
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Soft errors affect sram's future
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May 13
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D. hammers, "Soft errors affect SRAM's future," EE Times, May 13, 2003;
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(2003)
EE Times
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Hammers, D.1
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3
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3042514399
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ST tames soft errors in sram by adding capacitors
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Jan. 13
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R. Wilson, "ST tames soft errors in SRAM by adding capacitors," EE Times, Jan. 13, 2004.
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EE Times
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Wilson, R.1
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4
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0035722922
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Simulation of nucleon-induced nuclear reactions in a simplified sram structure: Scaling effects on seu and mbu cross sections
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a) F. Wrobel, J.-M. Patau, M.-C. Calvet, O. Bersillon, and H. Duaite, "Simulation of nucleon-induced nuclear reactions in a simplified SRAM structure: scaling effects on SEU and MBU cross sections," IEEE Trans. Nuc. Sci., vol. 48, pp. 1946-1952, 2001;
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Wrobel, F.1
Patau, J.-M.2
Calvet, M.-C.3
Bersillon, O.4
Duaite, H.5
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5
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0036927879
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The impact of technology scaling on soft error rate performance and limits to the efficacy of error correction
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R. Baumann, "The impact of technology scaling on soft error rate performance and limits to the efficacy of error correction," Proc. IEDM, pp. 329-332, 2002.
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Proc. IEDM
, pp. 329-332
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Baumann, R.1
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6
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Impact of scaling on soft-error rates in commercial microprocessors
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N. Seifert, X. Zhu, and L. W. Massengill, "Impact of scaling on soft-error rates in commercial microprocessors," IEEE Trans. Nuc. Sci., vol. 49, pp. 3100-3106, 2002.
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Zhu, X.2
Massengill, L.W.3
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7
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0034789870
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Impact of CMOS process scaling and soi on the soft error rates of logic processes
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S. Hareland, J. Maiz, M. Alavi, K. Mistry, S. Walsta, and C. Dai, "Impact of CMOS process scaling and SOI on the soft error rates of logic processes," Proc. 2001 Symp. VLSI Tech. Dig., pp. 73-74, 2001;
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Hareland, S.1
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Alavi, M.3
Mistry, K.4
Walsta, S.5
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8
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Single-event upset in evolving commercial silicon-on-insulator microprocessor technologies
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submitted to
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F. Iran, F. H. Farmanesh, G. M. Swift, A. H. Johnston, and G. L. Yoder, "Single-event upset in evolving commercial silicon-on-insulator microprocessor technologies," submitted to IEEE Trans. Nuc. Sci., 2003;
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IEEE Trans. Nuc. Sci
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Iran, F.1
Farmanesh, F.H.2
Swift, G.M.3
Johnston, A.H.4
Yoder, G.L.5
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9
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1242310284
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Comparisons of soft error rate for srams in commercial soi and bulk below the 130 nm technology node
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submitted to
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P. Roche, G. Gasiot, K. Forbes, V. O'Sullivan, and V. Ferlet, "Comparisons of soft error rate for SRAMs in commercial SOI and bulk below the 130 nm technology node," submitted to IEEE Trans. Nuc. Set., 2003.
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IEEE Trans. Nuc. Set
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Roche, P.1
Gasiot, G.2
Forbes, K.3
O'Sullivan, V.4
Ferlet, V.5
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10
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0038649284
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Neutron-induced latchup in srams at ground level
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P. E. Dodd, M. R. Shaneyfelt, J. R. Schwank, and G. L. Hash, "Neutron-induced latchup in SRAMs at ground level," Proc. IRPS, pp. 51-55, 2003;
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Dodd, P.E.1
Shaneyfelt, M.R.2
Schwank, J.R.3
Hash, G.L.4
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11
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1242310282
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Soft error rate increase for new generations of sram's
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submitted to
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T. Granlund and N. Olsson, "Soft error rate increase for new generations of SRAM's," submitted to IEEE Traits. Nuc Sci., 2003;
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(2003)
IEEE Traits. Nuc Sci
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Granlund, T.1
Olsson, N.2
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12
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9144268816
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Single event upset characterization of the pentium 4, pentium III and low power pentium mmx microprocessors using proton irradiation
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D. M. Hiemstra, S. Yu, and M. Pop, "Single event upset characterization of the Pentium 4, Pentium III and low power Pentium MMX microprocessors using proton irradiation," IEEEREDW, pp. 51-57, 2002.
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, pp. 51-57
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Hiemstra, D.M.1
Yu, S.2
Pop, M.3
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13
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0036624345
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Comparison of the sensitivity to heavy ions of 0.25-μm bulk and soi technologies
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G, Gasiot, V. Ferlet-Cavrois, P. Roche, P. Flatresse, C. D'Hose, O. Musseau, and J. du Port de Poncharra, "Comparison of the sensitivity to heavy ions of 0.25-μm bulk and SOI technologies," IEEE Trans. Nuc. Sci., vol. 49, pp. 1450-1455, 2002;
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Gasiot, G.1
Ferlet-Cavrois, V.2
Roche, P.3
Flatresse, P.4
D'Hose, C.5
Musseau, O.6
Poncharra De Port, J.7
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14
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0036957352
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SEU sensitivity of bulk and soi technologies to 14-mev neutrons
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G. Gasiot, V. Ferlet-Cavrois, J. Baggio, P. Roche, P. Flatresse, A. Guyot, P. Morel, O. Bersillon, and J. du Port de Pontcharra, "SEU sensitivity of bulk and SOI technologies to 14-MeV neutrons," IEEE Trans. Nuc. Sci., vol. 49, pp. 3032-3037, 2002.
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Gasiot, G.1
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Baggio, J.3
Roche, P.4
Flatresse, P.5
Guyot, A.6
Morel, P.7
Bersillon, O.8
Pontcharra De Port, J.9
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15
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0036947508
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Charge collection in soi capacitors and circuits and its effects on seu hardness
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J. R. Schwank, P. B. Dodd, M. R. Shaneyfelt, G. Vizkelethy, B. L. Draper, T. A. Hill, D, S. Walsh, G. L. Hash, B. L. Doyle, and F. D. McDaniel, "Charge collection in SOI capacitors and circuits and its effects on SEU hardness," IEEE Trans. Nuc. Sci, vol. 49, pp. 2937-2947,2002.
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Schwank, J.R.1
Dodd, P.B.2
Shaneyfelt, M.R.3
Vizkelethy, G.4
Draper, B.L.5
Hill D, T.A.6
Walsh, S.7
Hash, G.L.8
Doyle, B.L.9
McDaniel, F.D.10
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16
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0038454484
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Radiation effects in soi technologies
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and references therein
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J. R. Schwank, V. Ferlet-Cavrois, M. R. Shaneyfelt, P. Paillet, and P. E. Dodd, "Radiation effects in SOI technologies," IEEE Trans. Nuc. Sci., vol. 50, pp. 522-538, 2003, and references therein.
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IEEE Trans. Nuc. Sci
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Schwank, J.R.1
Ferlet-Cavrois, V.2
Shaneyfelt, M.R.3
Paillet, P.4
Dodd, P.E.5
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17
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0029770964
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Soft-error monte tarlo modeling program, semm
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a) P. C. Murley, and G. R. Srinivasan, "Soft-error Monte Tarlo modeling program, SEMM," IBM J. Res. Dev., vol. 40, pp. 109-118, 1996;
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Murley, P.C.1
Srinivasan, G.R.2
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18
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0028699690
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Parameter-free, predictive modeling of single event upsets due to protons, neutrons, and pions in terrestrial cosmic rays
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G. R. Srinivasan, H. K. Tang, and P. C. Murley, "Parameter-free, predictive modeling of single event upsets due to protons, neutrons, and pions in terrestrial cosmic rays," IEEE Trans. Nuc. Sci., vol. 41, pp. 2063-2070, 1994.
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19
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3042560681
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SEMM-2 a modeling system for single event analysis
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H. H. K.. Tang and E. H. Cannon, "SEMM-2 a Modeling System for Single Event Analysis," submitted to 2004 NSREC.
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NSREC
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Tang, H.H.K.1
Cannon, E.H.2
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20
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0036045251
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Managing soft errors in asics
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L. Wissel, S. Pheasant, C. LeBlanc, and B. Klaasen, "Managing soft errors in ASICs," Proc. IEEE 2002 Custom Integrated Circuits Conf., pp. 85-88,2002.
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Measurements of the flux and energy spectrum of cosmic-ray neutrons on the ground at various locations
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K. P. Rodbell, P. Goldhagen, T. H. Zabel, M. S. Gordon, H. H. K. Tang, J. M. Clem, and P. Bailey "Measurements of the flux and energy spectrum of cosmic-ray neutrons on the ground at various locations," submitted to 2004 NSREC.
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NSREC
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Rodbell, K.P.1
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Tang, H.H.K.5
Clem, J.M.6
Bailey, P.7
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R. C. Baumann, "Soft errors in advanced semiconductor devices - Part I: The three radiation sources," IEEE Trans. Dev. Mat. Rel., vol. l,pp. 17-22, 2001.
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IEEE Trans. Dev. Mat. Rel
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Baumann, R.C.1
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Single event upset in static random access memories in atmospheric neutron environments
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Y, Arita, M, Takai, I. Ogawa, and T. Kishimoto, "Single event upset in static random access memories in atmospheric neutron environments," Jpn. J. Appl. Phys., vol. 42, pp. L738-L740, 2003.
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Ogawa, T.I.2
Kishimoto, T.3
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25
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0036045605
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Soft error rate scaling for emerging soi technology options
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P. Oldiges, K. Bernstein, D. Heidel, B. Klaasen, E. Cannon, R. Dennard, H. Tang, M. leong, and H-S. P. Wong, "Soft error rate scaling for emerging SOI technology options," VLSI Symp. Tech. Dig, pp. 46-47, 2002.
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Oldiges, P.1
Bernstein, K.2
Heidel, D.3
Klaasen, B.4
Cannon, E.5
Dennard, R.6
Tang, H.7
Leong, M.8
Wong, H.-S.P.9
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