Opportunistic transient-fault detection

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2005, Pages 172-183

  Gomaa, Mohamed A ^a   Vijaykumar, T N ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS;

COMMODITY SYSTEMS; PARTIAL EXPLICIT REDUNDANCY (PER); PERFORMANCE SCALABILITY; TRANSIENT-FAULT TOLERANCE;

ERROR DETECTION;

EID: 27544468225     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1080695.1069985     Document Type: Conference Paper

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