A predictive reliability model for PMOS bias temperature degradation

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2002, Pages 505-508

  Mahapatra, S ^a   Alam, M A ^b  

^a INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^b AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL BONDS; ELECTRIC POTENTIAL; ELECTRON TRAPS; IMPACT IONIZATION; INTERFACES (MATERIALS); SILICON; STRESS ANALYSIS;

TEMPERATURE DEGRADATION;

MOSFET DEVICES;

EID: 0036932324     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

1. P. Chaparala et. al., in proc., Int. Reliability Workshop, p.95, 2000.
2. K. Uwasawa, T. Yamamoto and T. Mogami, in proc., Int. Electron Device Meet., p.871, 1995.
3. N. Kimizuka et. al., in proc., VLSI Tech. Symp., p.73, 1999.
4. T. Yamamoto, K. Uwasawa and T. Mogami, IEEE Trans. Electron Devices, p.921, 1999.
5. M. Makabe, T. Kubota and T. Kitano, in proc., Int. Reliability Phys. Symp., p.205, 2000.
6. B. S. Doyle et. al., in proc., Int. Electron Device Meet., p. 529, 1991.
7. G. La Rosa et. al., in proc., Int. Reliability Phys. Symp., p.282, 1997.
8. K. O. Jeppson, and C. M. Svensson, J. Appl. Phys., p.2004, 1997.
9. C. E. Blat, E. Nicollian and E. Poindexter, J. Appl. Phys., p.1712, 1991.
10. G. V. Gadiyak, Appl. Surf. Sc., p.627, 1997.
11. S. Ogawa, and N. Shiono, Phys. Rev. B, p.4298, 1995.
12. M. L. Reed and J. D. Plummer, Appl. Phys. Lett., p.514, 1987.
13. M. Alam, B. Weir and P. Silverman, in proc., Int. Workshop on Gate Insulator, p. 10, 2001.
14. M. L. Reed, J. Appl. Phys., p.5776, 1998.
15. S. Takagi et. al., IEEE Trans. Electron Devices, p.335, 1999.
16. M. Alam, J. Bude and A. Ghetti, in proc., Int. Reliability Phys. Symp., p.21, 2000.