Coding for reliable on-chip buses: A class of fundamental bounds and practical codes

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 26, Issue 5, 2007, Pages 977-982

  Sridhara, Srinivasa R ^a,b   Shanbhag, Naresh R ^c  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b TEXAS INSTRUMENTS   (United States)

^c United States of America   (United States)

Author keywords

Coding; Crosstalk; Error correction; Interconnect; Low power; On chip bus; Reliability

Indexed keywords

CMOS INTEGRATED CIRCUITS; CROSSTALK; ENERGY CONSERVATION; ERROR CORRECTION; MICROPROCESSOR CHIPS; RELIABILITY THEORY;

CODEC CIRCUITS; LOW POWER; LOW-SWING SIGNALING; ON-CHIP BUS;

ENCODING (SYMBOLS);

EID: 34248590882     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2006.884418     Document Type: Article

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